參數(shù)資料
型號: PE4231
廠商: Electronic Theatre Controls, Inc.
英文描述: SPDT High Power UltraCMOS? DC ? 1.3 GHz RF Switch
中文描述: 單刀雙擲高功率的UltraCMOS?直流? 1.3 GHz射頻開關
文件頁數(shù): 5/7頁
文件大?。?/td> 270K
代理商: PE4231
Product Specification
PE4231
Page 5 of 7
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0097-01
www.psemi.com
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4231 SPDT switch. The RF common port is
connected through a 75
transmission line to the
top left BNC connector, J1. Port 1 and Port 2 are
connected through 75
transmission lines to the
top two BNC connectors on the right side of the
board, J2 and J3. A through transmission line
connects BNC connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.021”, trace
gaps of 0.030”, dielectric thickness of 0.028”,
metal thickness of 0.0014” and
ε
r
of 4.4.
J6 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J6-3) is connected
to the device CNTL input. The fourth pin to the
right (J6-7) is connected to the device VDD input.
A decoupling capacitor (100 pF) is provided on
both CNTL and VDD traces. It is the responsibility
of the customer to determine proper supply
decoupling for their design application. Removing
these components from the evaluation board has
not been shown to degrade RF performance.
Figure 8. Evaluation Board Layouts
Figure 9. Evaluation Board Schematic
VDD
CNTL
GND
RFC
RF1
GND
GND
RF2
100 pF
Optional
100 pF
Optional
J6-7
J6-3
J1
J2
J3
J5
J4
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