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參數(shù)資料
| 型號： | PDM41024SA10TTY |
| 元件分類： | SRAM |
| 英文描述： | 128K X 8 STANDARD SRAM, 10 ns, PDSO32 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 301K |
| 代理商： | PDM41024SA10TTY |
PDM41024
Rev. 3.3 - 4/09/98
7
1
2
3
4
5
6
7
8
9
10
11
12
Write Cycle No. 3 (Chip Enable Controlled)
AC Electrical Characteristics
SHADED AREA = PRELIMINARY DATA
Notes referenced are after Data Retention Table
Description
-10(7)
-12(7)
-15
WRITE Cycle
Sym
Min.
Max.
Min.
Max.
Min.
Max.
Units
WRITE cycle time
tWC
10
12
15
ns
Chip enable active time
tCW
10
11
ns
Address valid to end of write
tAW
10
11
ns
Address setup time
tAS
0
00
ns
Address hold from end of write
tAH
0
00
ns
Write pulse width
tWP1
8
811
ns
Write pulse width
tWP2
8
812
ns
Data setup time
tDS
7
77
ns
Data hold time
tDH
0
00
ns
Write disable to output in low Z(1,3)
tLZWE
0
00
ns
Write enable to output in high Z(1,3)
tHZWE
777
ns
tWC
tAW
tWP1
tCW
tAH
tAS
tDH
tDS
ADDR
CE1
CE2
WE
DOUT
HIGH-Z
DIN
DATA VALID
NOTE: Output Enable (OE) is inactive (high)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDM41024SA12P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| PDM41024SA12SO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 Megabit Static RAM 128K x 8-Bit |
| PDM41024SA-12SO | 制造商:IXYS Corporation 功能描述:PDM41024SA Series 5 V 1 Mb ( 128 K x 8 ) 12 ns Static RAM - SOJ-32 |
| PDM41024SA12SOA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 Megabit Static RAM 128K x 8-Bit |
| PDM41024SA12SOATR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:1 Megabit Static RAM 128K x 8-Bit |
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