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參數(shù)資料
| 型號： | PDIUSBD12D |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | nullUSB interface device with parallel bus |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PDSO28 |
| 封裝： | 7.50 MM , PLASTIC, MS-013, SOT-136-1, SOP-28 |
| 文件頁數(shù)： | 3/35頁 |
| 文件大?。?/td> | 838K |
| 代理商： | PDIUSBD12D |
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Philips Semiconductors
PDIUSBD12
USB interface device with parallel bus
Product data
Rev. 08 — 20 December 2001
3 of 35
9397 750 09238
Koninklijke Philips Electronics N.V. 2001. All rights reserved.
3.2 Pin description
Table 1:
Symbol
DATA <0>
DATA <1>
DATA <2>
DATA <3>
GND
DATA <4>
DATA <5>
DATA <6>
DATA <7>
ALE
Pin description
Pin
Type
[1]
1
IO2
2
IO2
3
IO2
4
IO2
5
P
6
IO2
7
IO2
8
IO2
9
IO2
10
I
Description
Bit 0 of bidirectional data. Slew-rate controlled.
Bit 1 of bidirectional data. Slew-rate controlled.
Bit 2 of bidirectional data. Slew-rate controlled.
Bit 3 of bidirectional data. Slew-rate controlled.
Ground.
Bit 4 of bidirectional data. Slew-rate controlled.
Bit 5 of bidirectional data. Slew-rate controlled.
Bit 6 of bidirectional data. Slew-rate controlled.
Bit 7 of bidirectional data. Slew-rate controlled.
Address Latch Enable. The falling edge is used to close the
latch of the address information in a multiplexed address/ data
bus. Permanently tied LOW for separate address/ data bus
configuration.
Chip Select (Active LOW).
Device is in Suspend state.
Programmable Output Clock (slew-rate controlled).
Interrupt (Active LOW).
Read Strobe (Active LOW).
Write Strobe (Active LOW).
DMA Request.
DMA Acknowledge (Active LOW).
End of DMA Transfer (Active LOW). Double up as V
BUS
sensing.
EOT_N is only valid when asserted together with DMACK_N
and either RD_N or WR_N.
Reset (Active LOW and asynchronous). Built-in Power-on reset
circuit present on chip, so pin can be tied HIGH to V
CC
.
GoodLink LED indicator (Active LOW)
Crystal Connection 1 (6 MHz).
Crystal Connection 2 (6 MHz). If external clock signal, instead
of crystal, is connected to XTAL1, then XTAL2 should be
floated.
Voltage supply (4.0
5.5 V).
To operate the IC at 3.3 V, supply 3.3 V to both V
CC
and V
OUT3.3
pins.
USB D
data line.
USB D+ data line.
CS_N
SUSPEND 12
CLKOUT
INT_N
RD_N
WR_N
DMREQ
DMACK_N 18
EOT_N
11
I
I,OD4
O2
OD4
I
I
O4
I
I
13
14
15
16
17
19
RESET_N
20
I
GL_N
XTAL1
XTAL2
21
22
23
OD8
I
O
V
CC
24
P
D
D+
25
26
A
A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PDIUSBD12PW | nullUSB interface device with parallel bus |
| PDIUSBH11A | Universal Serial Bus hub(通用串行總線集線器) |
| PDIUSBH11ANB | Universal Serial Bus Hub |
| PDIUSBH11AD | Universal Serial Bus Hub |
| PDIUSBH11 | Universal Serial Bus Hub |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDIUSBD12D,112 | 功能描述:USB 接口集成電路 USB INTRFC W/PARL RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| PDIUSBD12D,118 | 功能描述:USB 接口集成電路 USB I-FACE W/PARALLEL BUS RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| PDIUSBD12D.112 | 制造商:NXP Semiconductors 功能描述:USB INTERFACE DEVICE SMD SOIC28 |
| PDIUSBD12DAA | 功能描述:IC USB INTRFC W/PARL BUS 28-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| PDIUSBD12D-T | 制造商:ST-Ericsson 功能描述:USB Peripheral Controller 28-Pin SO T/R |
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