參數(shù)資料
型號(hào): PDIUSBD12
廠商: NXP Semiconductors N.V.
英文描述: nullUSB interface device with parallel bus
中文描述: nullUSB接口設(shè)備與并行總線
文件頁(yè)數(shù): 3/35頁(yè)
文件大?。?/td> 838K
代理商: PDIUSBD12
Philips Semiconductors
PDIUSBD12
USB interface device with parallel bus
Product data
Rev. 08 — 20 December 2001
3 of 35
9397 750 09238
Koninklijke Philips Electronics N.V. 2001. All rights reserved.
3.2 Pin description
Table 1:
Symbol
DATA <0>
DATA <1>
DATA <2>
DATA <3>
GND
DATA <4>
DATA <5>
DATA <6>
DATA <7>
ALE
Pin description
Pin
Type
[1]
1
IO2
2
IO2
3
IO2
4
IO2
5
P
6
IO2
7
IO2
8
IO2
9
IO2
10
I
Description
Bit 0 of bidirectional data. Slew-rate controlled.
Bit 1 of bidirectional data. Slew-rate controlled.
Bit 2 of bidirectional data. Slew-rate controlled.
Bit 3 of bidirectional data. Slew-rate controlled.
Ground.
Bit 4 of bidirectional data. Slew-rate controlled.
Bit 5 of bidirectional data. Slew-rate controlled.
Bit 6 of bidirectional data. Slew-rate controlled.
Bit 7 of bidirectional data. Slew-rate controlled.
Address Latch Enable. The falling edge is used to close the
latch of the address information in a multiplexed address/ data
bus. Permanently tied LOW for separate address/ data bus
configuration.
Chip Select (Active LOW).
Device is in Suspend state.
Programmable Output Clock (slew-rate controlled).
Interrupt (Active LOW).
Read Strobe (Active LOW).
Write Strobe (Active LOW).
DMA Request.
DMA Acknowledge (Active LOW).
End of DMA Transfer (Active LOW). Double up as V
BUS
sensing.
EOT_N is only valid when asserted together with DMACK_N
and either RD_N or WR_N.
Reset (Active LOW and asynchronous). Built-in Power-on reset
circuit present on chip, so pin can be tied HIGH to V
CC
.
GoodLink LED indicator (Active LOW)
Crystal Connection 1 (6 MHz).
Crystal Connection 2 (6 MHz). If external clock signal, instead
of crystal, is connected to XTAL1, then XTAL2 should be
floated.
Voltage supply (4.0
5.5 V).
To operate the IC at 3.3 V, supply 3.3 V to both V
CC
and V
OUT3.3
pins.
USB D
data line.
USB D+ data line.
CS_N
SUSPEND 12
CLKOUT
INT_N
RD_N
WR_N
DMREQ
DMACK_N 18
EOT_N
11
I
I,OD4
O2
OD4
I
I
O4
I
I
13
14
15
16
17
19
RESET_N
20
I
GL_N
XTAL1
XTAL2
21
22
23
OD8
I
O
V
CC
24
P
D
D+
25
26
A
A
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