參數(shù)資料
型號(hào): PCM56U
英文描述: RJ 45 Jack, LED, Unshielded, Thru Hole, Side Entry, 8P/8C
中文描述: 串行輸入16位單片數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù): 4/9頁
文件大小: 94K
代理商: PCM56U
4
PCM56
DISCUSSION OF
SPECIFICATIONS
The PCM56 is specified to provide critical performance
criteria for a wide variety of applications. The most critical
specifications for D/A converter in audio applications are
Total Harmonic Distortion, Differential Linearity Error,
Bipolar Zero Error, parameter shifts with time and
temperature, and settling time effects on accuracy.
The PCM56 is factory-trimmed and tested for all critical key
specifications.
The accuracy of a D/A converter is described by the transfer
function shown in Figure 1. Digital input to analog output
relationship is shown in Table I. The errors in the D/A
converter are combinations of analog errors due to the linear
circuitry, matching and tracking properties of the ladder and
scaling networks, power supply rejection, and reference
errors. In summary, these errors consist of initial errors
including Gain, Offset, Linearity, Differential Linearity, and
Power Supply Sensitivity. Gain drift over temperature rotates
the line (Figure 1) about the bipolar zero point and Offset
drift shifts the line left or right over the operating temperature
range. Most of the Offset and Gain drift with temperature or
time is due to the drift of the internal reference zener diode.
The converter is designed so that these drifts are in opposite
directions. This way the Bipolar Zero voltage is virtually
unaffected by variations in the reference voltage.
DIGITAL INPUT CODES
The PCM56 accepts serial input data (MSB first) in the
Binary Two’s Complement (BTC) form. Refer to Table I
for input/output relationships.
FIGURE 1. Input vs Output for an Ideal Bipolar D/A Con-
verter.
BIPOLAR ZERO ERROR
Initial Bipolar Zero Error (Bit 1 “on” and all other bits “off”)
is the deviation from 0V out and is factory-trimmed to
typically
±
30mV at +25
°
C.
DIFFERENTIAL LINEARITY ERROR
Differential Linearity Error (DLE) is the deviation from an
ideal 1LSB change from one adjacent output state to the
next. DLE is important in audio applications because
excessive DLE at Bipolar Zero (at the “major carry”) can
result in audible crossover distortion for low level output
signals. Initial DLE on the PCM56 is factory trimmed to
typically
±
0.001% of FSR. The MSB DLE is adjustable to
zero using the circuit shown in Figure 6.
POWER SUPPLY SENSITIVITY
Changes in the DC power supplies will affect accuracy.
The PCM56 power supply sensitivity is shown by Figure 2.
Normally, regulated power supplies with 1% or less ripple
are recommended for use with the DAC. See also Power
Supply Connections paragraph in the Installation and
Operating Instructions section.
SETTLING TIME
Settling time is the total time (including slew time) required
for the output to settle within an error band around its final
value after a change in input (see Figure 3).
Settling times are specified to
±
0.006% of FSR: one for a
large output voltage change of 6V and one for a 1LSB
change. The 1LSB change is measured at the major carry
(0000 hex to ffff hex), the point at which the worst-case
settling time occurs.
DIGITAL INPUT
ANALOG OUTPUT
Binary Two’s
Complement (BTC)
Voltage (V),
V
OUT
Mode
Current (mA),
I
OUT
Mode
DAC Output
7FFF Hex
8000 Hex
0000 Hex
FFFF Hex
+ Full Scale
– Full Scale
Bipolar Zero
Zero –1LSB
+2.999908
–3.000000
0.000000
–0.000092
–0.999970
+1.000000
0.000000
+0.030500
μ
A
TABLE I. Digital Input to Analog Output Relationship.
Frequency (Hz)
1
86
80
74
68
62
56
52
46
40
34
28
P
10
100
1k
10k
100k
Negative Supplies
Positive Supplies
FIGURE 2. Power Supply Sensitivity.
Gain
Drift
Offset
Drift
Bipolar
Zero
0111...1111
0111...1110
0000...0010
0000...0001
0000...0000
1111...1111
1111...1110
1000...0001
1000...0000
D
–FSR/2
Analog Output
(+FSR/2) –1LSB
All Bits On
* See Table I for digital code definitions.
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