參數(shù)資料
型號: PCM54JP
英文描述: 16-Bit Monolithic DIGITAL-TO-ANALOG CONVERTERS
中文描述: 16位單片數(shù)字到模擬轉(zhuǎn)換器
文件頁數(shù): 6/7頁
文件大?。?/td> 83K
代理商: PCM54JP
PCM54/55
6
error at each sampling point. The THD can then be ex-
pressed as:
(2)
where E
rms
is the rms signal voltage level.
This expression indicates that, in general, there is a correla-
tion between the THD and the square root of the sum of the
squares of the linearity errors at each digital word of interest.
However, this expression does not mean that the worst-case
linearity error of the D/A is directly correlated to the THD.
For PCM54/55 the test period was chosen to be 22.7
μ
s
(44.1kHz) which is compatible with the EIAJ STC-007
specification for PCM audio. The test frequency is 420Hz
and the amplitude of the input signal is 0dB, –20dB, and
–60dB down from full scale.
Figure 4 shows the typical THD as a function of output
voltage.
Figure 5 shows typical THD as a function of frequency.
THD
n
i
i
rms
rms
i
n
Σ
L
Q
rms
=
=
+
=
ε
Ε
Ε
Ε
Ε
1
100
1
2
[
( )
( )]
%
INSTALLATION AND OPERATING
INSTRUCTIONS
POWER SUPPLY CONNECTIONS
For optimum performance and noise rejection, power supply
decoupling capacitors should be added as shown in the
connections diagram. These capacitors (1
μ
F tantalum or
electrolytic recommended) should be located close to the
converter.
MSB ERROR ADJUSTMENT PROCEDURE
(OPTIONAL)
The MSB error of the PCM54 and PCM55 can be adjusted
to make the differential linearity error (DLE) at BPZ essen-
tially zero. This is important when the signal output levels
are very low because zero crossing noise (DLE at BPZ)
becomes very significant when compared to the small code
changes occurring in the LSB portion of the converter.
Differential linearity error at bipolar zero is guaranteed to
meet data sheet specifications without any external adjust-
ment. However, a provision has been made for an optional
adjustment of the MSB linearity point which makes it
possible to eliminate DLE error at BPZ (PCM54 only). Two
procedures are given to allow either static or dynamic
adjustment. The dynamic procedure is preferred because of
the difficulty associated with the static method (accurately
measuring 16-bit LSB steps).
To statically adjust DLE at BPZ, refer to the circuit shown
in Figure 6 or the PCM54 connection diagram. After allow-
ing ample warm-up time (20-30 minutes) to assure stable
operation of the PCM54, select input code 8000 hexadeci-
mal (all bits off except the MSB). Measure and record it.
Change the digital input code to 7FFF hexadecimal (all bits
off except the MSB). Adjust the 100k
potentiometer to
make the audio output read 92
μ
V more than the voltage
reading of the previous code (a ILSB step = 92
μ
V).
A much simpler method is to dynamically adjust the DLE at
BPZ. Again, refer to Figure 6 or the PCM54 connection
diagram for circuitry and component values. Assuming the
device has been installed in a digital audio application
circuit, send the appropriate digital input to produce a –60dB
level sinusoidal output. While measuring the THD of the
audio circuit output, adjust the 100k
potentiometer until a
minimum level of distortion is observed.
0.1
0.05
0.02
0.01
0.005
0.002
0.001
100
1k
10k 20k
Frequency (Hz)
T
–20dB
Full Scale
FIGURE 5. Total Harmonic Distortion (THD) vs
Frequency.
10.0
4.0
2.0
1.0
0.4
0.2
0.1
0.04
0.02
0.01
0.004
0.002
0.001
–60
–50
–40
–30
–20
–10
0
V
OUT
(dB)
T
0dB = Full-Scale Range (FSR)
16 Bits
14 Bits
FIGURE 4. Total Harmonic Distortion (THD) vs V
OUT
.
FIGURE 6. MSB Differential Linearity at Bipolar Zero Ad-
justment Circuit (optional).
1M
560k
100k
330k
–V
CC
1
27
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