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| 型號(hào)： | PCM4222PFBRG4 |
| 英文描述： | High-Performance, Two-Channel, 24-Bit, 216kHz Sampling Multi-Bit Delta-Sigma Analog-to-Digital Converter |
| 中文描述： | 高性能，雙通道，24位，216kHz的采樣多位Δ-Σ模擬到數(shù)字轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 35/40頁(yè) |
| 文件大?。?/td> | 609K |
| 代理商： | PCM4222PFBRG4 |
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PCM4222
SBAS399A–OCTOBER 2006–REVISED MARCH 2007
The DIT channel status (C) and user (U) data bits in register page 2 may be programmed after the DIT block
has powered up. To program these bits, disable buffer transfers by setting the BTD bit in control register 0x08 to
'1'. Then, select register page 2 using register address 0x7F. You can now load the necessary C and U data
registers for the intended application by writing the corresponding data buffer addresses. When you have
finished writing the C and U data, select register page 0 using register address 0x7F. Re-enable buffer transfers
by setting the BTD bit in control register 0x08 to '0'.
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