參數(shù)資料
型號(hào)： PCM3794RHBT
元件分類(lèi)： Codec
英文描述： 16-Bit, Low-Power Stereo Audio CODEC With Microphone Bias, Headphone, and Digital Speaker Amplifier
中文描述： 16位，低功耗立體聲音頻編解碼器麥克風(fēng)偏置，耳機(jī)，揚(yáng)聲器放大器和數(shù)字
文件頁(yè)數(shù)： 19/63頁(yè)
文件大?。?/td> 915K
代理商： PCM3794RHBT
www.ti.com
t
w(SCKH)
SCKI
t
w(SCKL)
0.7 V
IO
0.3 V
IO
T0005-12
Power-On Reset and System Reset
Power On/Off Sequence
PCM3793
PCM3794
SLES193A–AUGUST 2006–REVISED SEPTEMBER 2006
PARAMETERS
SYMBOL
t
w(SCKH)
t
w(SCKL)
MIN
7
7
UNITS
ns
ns
System-clock pulse duration, high
System-clock pulse duration, low
Figure 25. System Clock Timing
The power-on-reset circuit outputs a reset signal, typically at V
DD
= 1.2 V, and this circuit does not depend on
the voltage of other power supplies (V
CC
, V
PA
and V
IO
). Internal circuits are cleared to default status, then signals
are removed from all analog and digital outputs. The PCM3793/94 does not require any power supply
sequencing. Register data must be written after turning all power supplies on.
System reset is enabled by setting register 85 (SRST), and all register are cleared automatically. All circuits are
reset to their default status at once. Note that the PCM3793/94 has audible pop noise on the analog outputs
when enabling SRST.
To reduce audible pop noise, a sequence of register settings is required after turning all power supplies on when
powering up, or before turning the power supplies off when powering down. If some modules are not required for
a particular application or operation, they should be placed in the power-down state after performing the
power-on sequence. The recommended power-on and power-off sequences are shown in
Table 2
and
Table 3
,
respectively.
Table 2. Recommended Power-On Sequence
STEP
REGISTER
SETTINGS
–
4027h
4127h
4227h
4327h
4427h
4527h
4620h
4BC0h
5102h
5A10h
49E0h
5601h
4803h
5811h
49FCh
NOTE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Turn on all power supplies
(1)
Headphone amplifier L-ch volume (–6 dB)
(2)
Headphone amplifier R-ch volume (–6 dB)
(2)
Speaker amplifier L-ch volume (–6 dB)
(2)
Speaker amplifier R-ch volume (–6 dB)
(2)
Digital attenuator L-ch (–24 dB)
(2)
Digital attenuator R-ch (–24 dB)
(2)
DAC audio interface format (left-justified)
(3)
Headphone detection enable and inverting polarity. Short and thermal detection enable
ADC audio interface format (left-justified)
(3)
V
COM
ramp up/down time control. PG1, PG2 gain control (0 dB)
DAC (DAL, DAR) and analog bias power up
Zero-cross detection enable
Analog mixer (MXL, MXR) power up
Analog mixer input (SW2, SW5) select
Headphone amplifier (HPL, HPR, HPC) power up
(1)
Power supply sequencing is not required. It is recommended to set register data with system clock input after turning all power supplies
on.
Any level is acceptable for volume or attenuation. Level should be resumed by register data recorded when system power off.
Audio interface format should be set to match the DSP or decoder being used.
(2)
(3)
19
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相關(guān)PDF資料
PDF描述
PCM3793 16-Bit, Low-Power Stereo Audio CODEC With Microphone Bias, Headphone, and Digital Speaker Amplifier
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