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參數(shù)資料
| 型號： | PCM3794RHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數(shù)： | 10/67頁 |
| 文件大小： | 1417K |
| 代理商： | PCM3794RHBT |
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Short Protection
Thermal Protection
Pop-Noise Reduction Circuit
Power Up/Down for Each Module
Digital Interface
Power Supply
DESCRIPTION OF OPERATION
System Clock Input
SLES193C – AUGUST 2006 – REVISED FEBRUARY 2007
The short-circuit protection on each headphone output prevents damage to the device while an output is shorted
to VPA, an output is shorted to PGND, or any two outputs are shorted together. When the short circuit is detected
on the outputs, the PCM3793/94 powers down the shorted amplifier at once. The short-protection status can be
monitored by reading register 77 (STHC, STHL, SCHR) through the I2C interface. Short-circuit protection
operates in any enabled headphone amplifier.
The thermal protection on the speaker amplifier prevents damage to the device when the internal die
temperature exceeds approximately 150
°C. Once the die temperature exceeds the thermal set point, all analog
outputs are powered down. This status can be reset by setting register 76 (RLSR, RLSL) and can be watched
by reading register 77 (STSR, STSL) on the two-wire (I2C) interface. Thermal protection operates in any enabled
speaker amplifier.
The pop-noise reduction circuit prevents audible noise when turning the power supply on/off and powering the
device up/down in portable applications. It is recommended to establish the register settings in the sequence
that is shown in Table 3 and Table 4. No particular external parts are required, and power-supply sequencing is
not necessary.
Using register 72 (PMXL, PMXR), register 73 (PBIS, PDAR, PDAL, PHPC, PHPR, PHPL, PSPR, PSPL), register
82 (PAIR, PAIL, PADS, PMCB, PADR, PADL), and register 90 (PCOM), unused modules can be powered down
to minimize power consumption (7 mW during playback only and 13 mW when recording only).
All digital I/O pins can interface at various power supply voltages. The VIO pin can be connected to a 1.71-V to
3.6-V power supply.
The VCC pin and the VPA pin can be connected to 2.4 V to 3.6 V. The same voltage must be applied to both pins.
The VDD pin and the VIO pin can be connected to 1.71 V to 3.6 V. A different voltage can be applied to each of
these pins (for example, VDD = 1.8 V, VIO = 3.3 V).
The PCM3793/94 can accept clocks of various frequencies without a PLL. They are used for clocking the digital
filters and automatic level control and delta-sigma modulators and are classified as common-audio and
application-specific clocks. Table 2 shows frequencies of the common-audio clock and application-specific clock.
Figure 25 shows the timing requirements for system clock inputs. The sampling rate and frequency of the
system clocks are determined by the settings of register 86 (MSR[2:0]) and register 85 (NPR[5:0]). Note that the
sampling rate of the application-specific clock has a little sampling error.
Table 2. System Clock Frequencies
CLOCK
FREQUENCIES
Common-audio clock
11.2896, 12.288, 16.9344, 18.432 MHz
Application-specific clock
12, 13, 13.5, 24, 26, 27, 19.2, 19.68, 38.4, 39.36 MHz
18
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