參數(shù)資料
型號: PCM3052ARTF
元件分類: Codec
英文描述: 24-BIT, 96-kHz STEREO AUDIO CODEC WITH MICROPHONE AMPLIFIER, BIAS, MUXTIPLEXER, AND PGA
中文描述: 24位,96千赫立體聲音頻編解碼器麥克風(fēng)放大器,偏見,MUXTIPLEXER,和PGA
文件頁數(shù): 36/45頁
文件大?。?/td> 583K
代理商: PCM3052ARTF
www.ti.com
ADPSV: ADC Power-Save Control (ADC)
DAPSV: DAC Power-Save Control (DAC)
OVR1: Oversampling Rate Control (DAC)
MUTx: Soft-Mute Control (DAC)
PCM3052A
SLES160–NOVEMBER 2005
SRST = 0
SRST = 1
Re-synchronization
Normal operation (default)
The SRST bit controls system reset. The PCM3052A does not go into power-down state. The mode control
register is not reset by this control. Also pop-noise may be generated.
Default value: 0
ADPSV = 0
ADPSV = 1
Normal operation (default)
Power-save mode
The ADPSV bit controls ADC power-save mode. In power-save mode, ADC goes into power-down state, the
data in ADC are reset, and DOUT is forced into ZERO immediately. I
2
C control is enabled.
Default value: 0
DAPSV = 0
DAPSV = 1
Normal operation (default)
Power-save mode
The DAPSV bit controls the DAC power-save mode. In the power-save mode, the DAC output is faded out and
DAC goes into the power-down state. I
2
C control is enabled. A waiting time of more than 2100/f
S
from
power-save-mode assertion is required for the release of the power-save mode.
DIT function is available if SPDIF bit = 1, even though DAPSV = 1.
B15
0
B14
1
B13
0
B12
0
B11
0
B10
1
B9
0
B8
0
B7
RSV
B6
B5
RSV
B4
RSV
B3
RSV
B2
RSV
B1
B0
REGISTER 68
OVR1
MUT2
MUT1
Default value: 0
OVR1 = 0
OVR1 = 1
64
×
oversampling (default)
128
×
oversampling
The OVR1 bit is used to control the oversampling rate of the delta-sigma D/A converters. To write over this
register during normal operation may generate noise.
where, x = 1 or 2, corresponding to the DAC output V
OUT
L (x = 1) and V
OUT
R (x = 2).
Default value: 0
MUTx = 0
MUTx = 1
Mute disabled (default)
Mute enabled
The mute bits, MUT1 and MUT2, are used to enable or disable the soft-mute function for the corresponding DAC
outputs, V
OUT
L and V
OUT
R. The soft-mute function is incorporated into the digital attenuators. When mute is
disabled (MUTx = 0), the attenuator and DAC operate normally. When mute is enabled by setting MUTx = 1, the
digital attenuator for the corresponding output is decreased from the current setting to infinite attenuation, one
attenuator step (0.5 dB) for every 8/f
S
seconds. This provides
pop-free
muting of the DAC output.
By setting MUTx = 0, the attenuator is increased one step for every 8/f
S
seconds to the previously programmed
attenuation level.
36
相關(guān)PDF資料
PDF描述
PCM3052ARTFG4 24-BIT, 96-kHz STEREO AUDIO CODEC WITH MICROPHONE AMPLIFIER, BIAS, MUXTIPLEXER, AND PGA
PCM3052ARTFR 24-BIT, 96-kHz STEREO AUDIO CODEC WITH MICROPHONE AMPLIFIER, BIAS, MUXTIPLEXER, AND PGA
PCM3052ARTFRG4 24-BIT, 96-kHz STEREO AUDIO CODEC WITH MICROPHONE AMPLIFIER, BIAS, MUXTIPLEXER, AND PGA
PCM3501 Low Voltage, Low Power, 16-Bit, Mono VOICE/MODEM CODEC
PCM3501E Low Voltage, Low Power, 16-Bit, Mono VOICE/MODEM CODEC
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PCM3052RTFR 制造商:Texas Instruments 功能描述:
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