- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382384 > PCM3003 16-/20-Bit Single-Ended Analog Input/Output STEREO AUDIO CODECs PDF資料下載
參數(shù)資料
| 型號： | PCM3003 |
| 元件分類： | Codec |
| 英文描述： | 16-/20-Bit Single-Ended Analog Input/Output STEREO AUDIO CODECs |
| 中文描述： | 16-/20-Bit單端模擬輸入/輸出立體聲編解碼器 |
| 文件頁數(shù)： | 21/23頁 |
| 文件大小： | 206K |
| 代理商： | PCM3003 |
21
PCM3002/3003
PCM3003 DATA FORMAT CONTROL
PCM3003 has hardware functional control using PDAD (pin
7) and PDDA (pin 8) for Power-Down Control; DEM0 (pin
18) and DEM1 (pin 17) for de-emphasis; and 20BIT (pin 16)
for 16-/20-bit format selection.
Power-Down Control (Pin 7 and Pin 8)
Both the ADC’s and DAC’s Power-Down Control pins
place the ADC or DAC section in the lowest power con-
sumption mode. The ADC/DAC operation is stopped by
cutting the supply current to the ADC/DAC section. DOUT
is fixed to zero during ADC Power-Down Mode enable and
V
OUT
is fixed to GND during DAC Power-Down Mode
enable. Figure 8 illustrates the ADC and DAC output re-
sponse for Power-Down ON/OFF.
PDAD
PDDA
POWER DOWN
Low
Low
High
High
Low
High
Low
High
Reset (ADC/DAC Power-Down Enable)
ADC Power-Down/DAC Operates
ADC Operates/DAC Power-Down
ADC and DAC Normal Operation
De-Emphasis Control (Pin 17 and Pin 18)
DEM0 (pin 18) and DEM1 (pin 17) are used as de-emphasis
control pins.
DEM1
DEM0
DE-EMPHASIS
Low
Low
High
High
Low
High
Low
High
De-Emphasis Enabled for 44.1kHz
De-Emphasis Disabled
De-Emphasis Enabled for 48kHz
De-Emphasis Enabled for 32kHz
20BIT Audio Data Selection (Pin 16)
20BIT
FORMAT
Low
ADC: 16-bit MSB-first, Left-justified
DAC: 16-bit MSB-first, Right-justified
ADC: 20-bit MSB-first, Left-justified
DAC: 20-bit MSB-first, Right-justified
High
APPLICATION AND LAYOUT
CONSIDERATIONS
POWER SUPPLY BYPASSING
The digital and analog power supply lines to PCM3002/
3003 should be bypassed to the corresponding ground pins
with both 0.1
μ
F ceramic and 10
μ
F tantalum capacitors as
close to the device pins as possible. Although PCM3002/
3003 has three power supply lines to optimize dynamic
performance, the use of one common power supply is
generally recommended to avoid unexpected latch-up or pop
noise due to power supply sequencing problems. If separate
power supplies are used, back-to-back diodes are recom-
mended to avoid latch-up problems.
GROUNDING
In order to optimize the dynamic performance of PCM3002/
3003, the analog and digital grounds are not connected
internally. The PCM3002/3003 performance is optimized
with a single ground plane for all returns. It is recommended
to tie all PCM3002/3003 ground pins with low impedance
connections to the analog ground plane. PCM3002/3003
should reside entirely over this plane to avoid coupling high
frequency digital switching noise into the analog ground
plane.
VOLTAGE INPUT PINS
A tantalum or aluminum electrolytic capacitor, between 1
μ
F
and 10
μ
F, is recommended as an AC-coupling capacitor at
the inputs. Combined with the 30k
characteristic input
impedance, a 1.0
μ
F coupling capacitor will establish a 5.3Hz
cut-off frequency for blocking DC. The input voltage range
can be increased by adding a series resistor on the analog
input line. This series resistor, when combined with the 30k
input impedance, creates a voltage divider and enables larger
input ranges.
V
REF
INPUTS
A 4.7
μ
F to 10
μ
F tantalum capacitor is recommended be-
tween V
REF
L, V
REF
R, and AGND to ensure low source
impedance for the ADC’s references. These capacitors should
be located as close as possible to the reference pins to reduce
dynamic errors on the ADC reference.
V
COM
INPUTS
A 4.7
μ
F to 10
μ
F tantalum capacitor is recommended be-
tween V
COM
and AGND to ensure low source impedance of
the ADC and DAC common voltage. This capacitor should
be located as close as possible to the V
COM
pin to reduce
dynamic errors on the DC common mode voltage.
SYSTEM CLOCK
The quality of the system clock can influence dynamic
performance of both the ADC and DAC in the PCM3002/
3003. The duty cycle and jitter at the system clock input pin
must be carefully managed. When power is supplied to the
part, the system clock, bit clock (BCKIN) and a word clock
(LCRIN) should also be supplied simultaneously. Failure to
supply the audio clocks will result in a power dissipation
increase of up to three times normal dissipation and may
degrade long term reliability if the maximum power dissipa-
tion limit is exceeded.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCM3003E | 16-/20-Bit Single-Ended Analog Input/Output STEREO AUDIO CODECs |
| PCM3002 | 16-/20-Bit Single-Ended Analog Input/Output SoundPlus8482， |
| PCM4104 | High-Performance, 24-Bit, 216kHz sampling, Four-channel Audio Digital-to-Analog Converter |
| PCM4104PFBR | High-Performance, 24-Bit, 216kHz sampling, Four-channel Audio Digital-to-Analog Converter |
| PCM4104PFBT | High-Performance, 24-Bit, 216kHz sampling, Four-channel Audio Digital-to-Analog Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCM-300-324 | 功能描述:電線鑒定 Pre-Printed WM Card, Vinyl Cloth, .22" W RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in |
| PCM3003E | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3003E | 制造商:Texas Instruments 功能描述:IC AUDIO CODEC SMD 3003 SSOP24 |
| PCM3003E/2K | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3003E/2KG4 | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。