參數(shù)資料
型號(hào): PCM1850PJT
英文描述: 24-BIT, 96-kHz STEREO A/D CONVERTER WITH 6 X 2-CHANNEL MUX AND PGA
中文描述: 24位,96千赫立體聲A / D轉(zhuǎn)換器6 × 2通道的MUX和PGA
文件頁(yè)數(shù): 14/30頁(yè)
文件大小: 370K
代理商: PCM1850PJT
PCM1850
PCM1851
SLES108
MARCH 2004
www.ti.com
14
POWER-ON RESET SEQUENCE
The PCM1850/1851 has an internal power-on reset circuit, and initialization (reset) is performed automatically at the time
that the power supply (V
DD
) exceeds 2.2 V (typ). While V
DD
< 2.2 V (typ) and for 1024 system clocks after V
DD
> 2.2 V (typ),
the PCM1850/1851 stays in the reset state and the digital output is forced to zero. The digital output is valid after the reset
state is released and the time of 4500/f
S
has passed. At the moment of the power-on reset release, the PCM1850/1851
does not need a system clock. Figure 21 illustrates the internal power-on reset timing and the digital output for power-on
reset.
System Clock
2.6 V
2.2 V
1.8 V
Internal Reset
DOUT
Zero Data
Normal Data
Reset
V
DD
Release From Reset
1024 System Clocks
4500/f
S
Figure 21. Internal Power-On Reset Timing
相關(guān)PDF資料
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PCM1850PJTR 24-BIT, 96-kHz STEREO A/D CONVERTER WITH 6 X 2-CHANNEL MUX AND PGA
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