參數(shù)資料
型號(hào): PCM1773RGA
元件分類: DAC
英文描述: LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER
中文描述: 低電壓和低功耗立體聲音頻數(shù)模轉(zhuǎn)換器與線路輸出AMPIIFIER
文件頁數(shù): 21/29頁
文件大?。?/td> 309K
代理商: PCM1773RGA
SLES010D – SEPTEMBER 2001 – REVISED MAY 2004
www.ti.com
21
MC
MS
MD
16-Bits
(1) Single Write Operation
MSB
LSB
MSB
(2) Continuous Write Operation
MSB
LSB
MSB
LSB
MSB
LSB
16-Bits x N Frames
MC
MS
MD
N Frames
Figure 26. Register Write Operation
CONTROL INTERFACE TIMING REQUIREMENTS (PCM1772)
Figure 27 shows a detailed timing diagram for the serial control interface. These timing parameters are critical for proper
control port operation.
t(MCH)
50% of VCC1
MS
t(MLS)
LSB
50% of VCC1
50% of VCC1
t(MCL)
t(MHH)
t(MLH)
t(MCY)
t(MDH)
t(MDS)
MC
MD
PARAMETERS
SYMBOL
t(MCY)
t(MCL)
t(MCH)
t(MHH)
t(MLS)
t(MLH)
t(MDH)
t(MDS)
MIN
100(1)
TYP
MAX
UNITS
ns
MC pulse cycle time
MC low-level time
50
ns
MC high-level time
50
ns
MS high-level time
(2)
ns
MS falling edge to MC rising edge
20
ns
MS hold time
20
ns
MD hold time
15
ns
MD setup time
(1)When MC runs continuously between transactions, MC pulse cycle time is specified as 3/(128 fS), where fS is sampling rate.
(2)3/(128fS) s (min), where fS is sampling rate
Figure 27. Control Interface Timing
20
ns
相關(guān)PDF資料
PDF描述
PCM1773RGAR LOW VOLTAGE AND LOW POWER STEREO AUDIO DIGITAL TO ANALOG CONVERTER WITH LINEOUT AMPIIFIER
PCM1800 Single-Ended Analog Input 20-Bit Stereo ANALOG-TO-DIGITAL CONVERTER
PCM1800E Single-Ended Analog Input 20-Bit Stereo ANALOG-TO-DIGITAL CONVERTER
PCM1801 16-Bit, Stereo, Audio ANALOG-TO-DIGITAL CONVERTER
PCM1801U 16-Bit, Stereo, Audio ANALOG-TO-DIGITAL CONVERTER
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