參數(shù)資料
型號: PCM1733
英文描述: Stereo Audio DIGITAL-TO-ANALOG CONVERTER 18 Bits, 96kHz Sampling
中文描述: 立體聲音頻數(shù)模轉(zhuǎn)換器18位,96kHz采樣
文件頁數(shù): 7/9頁
文件大?。?/td> 129K
代理商: PCM1733
7
PCM1733
Reset
Reset Removal
2.6V
2.2V
1.8V
V
CC
Internal Reset
SCKI Clock
DIN
BCKIN
LRCIN
2
3
1
13
12
FORMAT
DM
SCKI
9
5
7
8
6
14
PCM
Audio Data
Processor
256f
S
/384f
S
CLK
GND
Mode Control
Lch Analog Out
+5V Analog
Rch Analog Out
V
CC
V
OUT
L
CAP
V
OUT
R
PCM1733
+10μF
Post
LPF
Post
LPF
PCM1733 has a system clock detection circuit which auto-
matically detects the frequency, either 256f
S
or 384f
S
. The
system clock should be synchronized with LRCIN (pin 1),
but PCM1733 can compensate for phase differences. If the
phase difference between LRCIN and system clock is greater
than
±
6 bit clocks (BCKIN), the synchronization is per-
formed automatically. The analog outputs are forced to a
bipolar zero state (V
CC
/2) during the synchronization func-
tion. Table I shows the typical system clock frequency
inputs for the PCM1733.
SYSTEM CLOCK
FREQUENCY (MHz)
256f
S
384f
S
32kHz
44.1kHz
48kHz
8.192
11.2896
12.288
12.288
16.9340
18.432
SAMPLING
RATE (LRCIN)
TABLE I. System Clock Frequencies vs Sampling Rate.
TYPICAL CONNECTION DIAGRAM
Figure 5 illustrates the typical connection diagram for
PCM1733 used in a stand-alone application.
INPUT DATA FORMAT
PCM1733 can accept input data in either normal (MSB-first,
right-justified) or I
2
S formats. When pin 13 (FORMAT) is
LOW, normal data format is selected; a HIGH on pin 13
selects I
2
S format.
FORMAT
0
1
Normal Format (MSB-first, right-justified)
I
2
S Format (Philips serial data protocol)
TABLE II. Input Format Selection.
FIGURE 6. Internal Power-On Reset Timing.
FIGURE 5. Typical Connection Diagram.
RESET
PCM1733 has an internal power-on reset circuit. The internal
power-on reset initializes (resets) when the supply voltage
V
CC
> 2.2V (typ). The power-on reset has an initialization
period equal to 1024 system clock periods after V
CC
> 2.2V.
During the initialization period, the outputs of the DAC are
invalid, and the analog outputs are forced to V
CC
/2. Figure 6
illustrates the power-on reset and reset-pin reset timing.
DE-EMPHASIS CONTROL
Pin 12 (DM) enables PCM1733’s de-emphasis function. De-
emphasis operates only at 44.1kHz.
DM
0
1
De-emphasis OFF
De-emphasis ON (44.1kHz)
TABLE III. De-emphasis Control Selection.
相關(guān)PDF資料
PDF描述
PCM1738 24-Bit, 192kHz Sampling, Advanced Segment, Audio-Stereo DIGITAL-TO-ANALOG CONVERTER
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PCM1738E 24-Bit, 192kHz Sampling, Advanced Segment, Audio-Stereo DIGITAL-TO-ANALOG CONVERTER
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PCM1733UG4 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Stereo DAC 18 Bits 96kHz Sampling RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
PCM1734E-2 制造商:Texas Instruments 功能描述: