參數(shù)資料
型號(hào): PCM1710U
英文描述: Stereo Audio DIGITAL-TO-ANALOG CONVERTER
中文描述: 立體聲音頻數(shù)字模擬轉(zhuǎn)換器
文件頁數(shù): 11/17頁
文件大?。?/td> 192K
代理商: PCM1710U
11
PCM1710U
FUNCTION MODE SELECTION
B0
B1
B2
BIT NO.
FLAG
MODE
BIT VALUE
SELECTED FUNCTION
DEFAULT
B3
B4
DEEM2
DEEM1
Sampling Frequency
for De-emphasis
Mode
1
H
L
L
B5
IIR
De-emphasis
0
1
0
1
0
1
De-emphasis OFF
De-emphasis ON
Mute OFF
Mute ON
Double-speed OFF
Double-speed ON
B6
MUTE
Mute
B7
DSD
Double-Speed
B3
Not Assigned
B4
TST
Test Mode
0
1
0
1
0
1
0
1
Infinite Zero Detection OFF
Infinite Zero Detection ON
16-Bit
20-Bit
Lch:high/Rch:low
Lch:low/Rch:high
Normal
IIS
Mode
2
H
L
H
B5
IW
Input Resolution
B6
LRPL
Polarity for LRCI
Lch:high
Rch:low
B7
IIS
Input Format
DEEM2
0
1
DEEM1
0
1
48kHz
44.1kHz
32kHz
FIGURE 6. Mode Control Input Format, Serial Mode.
DIGITAL DE-EMPHASIS
PCM1710 allows three different sampling rates for digital
de-emphasis. B3 and B4 are used for binary control of the
de-emphasis frequency:
B3
B4
Frequency
0
0
1
1
0
1
0
1
OFF
48kHz
32kHz
44.1kHz
MODE 1 CONTROLS
This mode can be enabled with the sequence of 1, 0, 0 as the
first three bits on MD (pin 26). This mode allows for the
following functions:
De-emphasis
De-emphasis Frequency
Soft Mute
Double-Speed Dubbing
On/Off
32kHz, 44.1kHz, 48kHz
On/Off
On/Off
DIGITAL ATTENUATION
One of the functions which can be implemented through use
of the serial mode control is attenuation. This function
allows the user to control the level of the output, indepen-
dent of the of the input level set by the actual input data
supplied to the DAC.
Referring to Figure 6, when the first data bit (B0) on MD
(pin 26) is low, the attenuation function is enabled. The next
seven bits (B1 - B6) define a binary value, ATT_DATA, that
indicates the desired level of attenuation. The attenuation
level is given by:
Level = 20log
10
(1 - ATT_DATA/127) dB
When all 7 bits of the ATT_DATA word are high
(ATT_DATA = 127), attenuation is infinite and the output
of PCM1710 will be zero.
MODE
TABLE VII. Serial-Mode Control Input Format (Pin 24 [MODE] = H)—Refer to Figure 6 for Timing Diagram.
MODE BY
L
H
H
ML
Attenuation
Mode
Mode 1
ATT_DATA
Mode 2
Bit#
MC
D6
L
L
D5
L
H
D4
DEEM2
D3
DEEM1
TST
IW
D2
IIR
D1
MUTE
LRPL
D0
DSD
IIS
B0
B1
B2
B4
B5
B6
B7
B3
MD
NOTE: Cycle Time for Model Control—Cycle time for mode control must be set over 128 times of minimum system clock.
OFF
OFF
OFF
ON
16-Bit
Normal
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