參數(shù)資料
型號： PCK2023DL
廠商： NXP SEMICONDUCTORS
元件分類： XO, clock
英文描述： CK408 66/100/133/200 MHz spread spectrum differential system clock generator
中文描述： 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝： 7.50 MM, PLASTIC, MO-118, SOT-371-1, SSOP-56
文件頁數(shù)： 18/30頁
文件大小： 177K
代理商： PCK2023DL
Philips Semiconductors
Product data
PCK2023
CK408 (66/100/133/200 MHz) spread
spectrum differential system clock generator
2001 Sep 07
18
BYTE 0
BIT
DESCRIPTION/FUNCTION
TYPE
POWER UP
CONDITION
OUTPUT(S)
AFFECTED
PIN AFFECTED
SOURCE PIN
0
S0 reflects the value of the
Sel_0 pin sampled on
power-up
R
externally selected
N/A
N/A
54
1
S1 reflects the value of the
Sel_1 pin sampled on
power-up
R
externally selected
N/A
N/A
55
2
S2 reflects the value of the
Sel_2 pin sampled on
power-up
R
externally selected
N/A
N/A
40
3
PCI_stop. This bit is ANDed
with the PCI_STOP pin for
I
2
C readback and control of
PCI outputs
RW
externally selected
All PCI clock
outputs except
PCI[2:0] pins
10, 11, 12, 13, 16,
17, 18
34
4
CPU_stop reflects the
current value of the external
CPU_Stop pin
R
externally selected
All CPU clock pairs
44, 45, 48, 49, 51,
52
53
5
VCH select 66 MHz/48MHz
enabled
RW
0 = 66MHz enabled
3V66_1/VCH
35
N/A
6
not used
—
0
—
—
—
7
spread spectrum enabled
RW
0 = spread off
CPU[2:0],
3V66[1:0]
5, 6, 7, 10, 11, 12,
13, 16, 17, 18, 33,
35
N/A
BYTE 1
BIT
DESCRIPTION/FUNCTION
TYPE
POWER UP
CONDITION
OUTPUT(S)
AFFECTED
PIN AFFECTED
SOURCE PIN
0
CPU0 output enable
1 = enabled
0 = disabled
RW
1 = enabled
CPU0
CPU0
51, 52
N/A
1
CPU1 output enable
1 = enabled
0 = disabled
RW
1 = enabled
CPU1
CPU1
48, 49
55
2
CPU2 output enable
1 = enabled
0 = disabled
RW
1 = enabled
CPU2
CPU2
44, 45
40
3
allow control of CPU0 with
assertion of CPU_Stop
1 = enabled
0 = disabled
RW
0 = not free running,
is affected by
CPU_Stop
CPU0
CPU0
51, 52
34
4
allow control of CPU1 with
assertion of CPU_Stop
1 = enabled
0 = disabled
RW
0 = not free running,
is affected by
CPU_Stop
CPU1
CPU1
48, 49
53
5
allow control of CPU2 with
assertion of CPU stop
1 = enabled
0 = disabled
RW
0 = not free running,
is affected by
CPU_Stop
CPU2
CPU2
44, 45
N/A
6
not used
—
0
—
—
—
7
CPU Mult0 value sampled
at startup
R
externally selected
N/A
N/A
43
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參數(shù)描述
PCK2023DL,512 功能描述:鎖相環(huán) - PLL WIT -CHG 112 TO 512 RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
PCK2023DL,518 功能描述:時鐘發(fā)生器及支持產(chǎn)品 WIT -CHG 112 TO 512 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
PCK2023DL-T 功能描述:時鐘發(fā)生器及支持產(chǎn)品 WIT -CHG 112 TO 512 PCK METHOD RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
PCK2057 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:70 - 190 MHz I2C differential 1:10 clock driver
PCK2057DGG 功能描述:鎖相環(huán) - PLL DN RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
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