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參數(shù)資料
| 型號(hào)： | PCK2021DGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | CK00 100/133 MHz spread spectrum differential system clock generator |
| 中文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, SOT-362-1, TSSOP-48 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 108K |
| 代理商： | PCK2021DGG |
Philips Semiconductors
Product data
PCK2021
CK00 (100/133 MHz) spread spectrum differential
system clock generator
2001 Oct 11
3
PIN DESCRIPTION
PIN(S)
SYMBOL
FUNCTION
1, 2, 8, 9,
12, 18, 24,
25, 31, 37,
40
V
DD
3.3 V power supply
Pins 9, 12, and 18 supply host output pairs 0, 1, and 2.
Pins 37 and 40 supply host output pairs 3, 4, and 5.
3, 4
48M_0/SELA
48M_1/SELB
3V66
3.3 V fixed 48 MHz clock outputs. During power-up pins function as latched inputs that enable SELA and
SELB prior to the pins being used for output of 3 V at 48 MHz. Part must be clocked to latch data in.
66 MHz clock: 66 MHZ reference clock
6
10, 11
HCLK0
HCLKB0
HCLK1
HCLKB1
HCLK2
HCLKB2
PCI0
PCI1
HCLK3
HCLKB3
HCLK4
HCLKB4
HCLK5
HCLKB5
REF
Host output pair 0
13, 14
Host output pair 1
16, 17
Host output pair 2
47, 48
33 MHz clocks: 33 MHz reference clocks
39, 38
Host output pair 3
36, 35
Host output pair 4
33, 32
Host output pair 5
19
3.3 V fixed 14.318 MHz output
20
SPREAD
Enables spread spectrum mode when held LOW on differential host outputs, 3V66 and PCI clocks.
Asserts LOW.
Crystal input
22
XIN
23
XOUT
Crystal output
26
I
REF
This pin controls the reference current for the host pairs. This pin requires a fixed precision resistor tied to
ground in order to establish the correct current.
Select input pin used to control the scaling of the HCLK and HCLKB output current.
29, 30
MULTSEL0
MULTSEL1
PWRDWN
41
Device enters power-down mode when held LOW. Asserts LOW.
45
SEL133/100
Select input pin for enabling 133 MHz or 100 MHz CPU outputs
5, 7, 15,
21, 27, 28,
34, 46
43
V
SS
Ground
V
DDA
V
SSA
3.3 V power supply for analog circuits
42
Ground for analog circuits
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| PCK2022R | CK00 100/133 MHz spread spectrum differential system clock generator |
| PCK2022RDGG | CK00 100/133 MHz spread spectrum differential system clock generator |
| PCK2023DGG | CK408 66/100/133/200 MHz spread spectrum differential system clock generator |
| PCK2023DL | CK408 66/100/133/200 MHz spread spectrum differential system clock generator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCK2021DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK00 100/133 MHz spread spectrum differential system clock generator |
| PCK2021DL,112 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 CK00 100/133MHZ SSD SYS CLKGEN RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| PCK2021DL,118 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 CK00 100/133MHZ SSD SYS CLKGEN RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| PCK2022R | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK00 100/133 MHz spread spectrum differential system clock generator |
| PCK2022RA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CK00 (100/133 MHz) spread spectrum differential system clock generator |
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