- 您現(xiàn)在的位置：買賣IC網 > PDF目錄367820 > PCF8801U (NXP SEMICONDUCTORS) LCD driver for 140 x 2 segments PDF資料下載
參數(shù)資料
| 型號： | PCF8801U |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顯示驅動器 |
| 英文描述： | LCD driver for 140 x 2 segments |
| 中文描述： | LIQUID CRYSTAL DISPLAY DRIVER, UUC174 |
| 封裝： | DIE |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 85K |
| 代理商： | PCF8801U |
2000 Feb 04
5
Philips Semiconductors
Product specification
LCD driver for 140
×
2 segments
PCF8801
FUNCTIONAL DESCRIPTION
Refer to block diagram Fig.1. The PCF8801 comprises a
bi-directional 280-bit input shift register, 280-bit output
register,outputmultiplexerproviding140-segmentoutputs
via a routing block and output drivers, two 3-level
backplane outputs, internal oscillator and internal
power-on reset circuit. To reduce the length of routing
requiredbetweencascadedchipsinmultiplechip-on-glass
applications, all inputs/outputs for control lines, clock
signals and data are provided at both sides of the narrow
package.
Shift register
The 280-bit bi-directional shift register shifts data on the
rising edge of clock signal CLKI. The shift register output
bits are called SH1_1, SH1_2 to SH140_1, SH140_2.
The direction in which data is shifted and the pads that are
valid for inputs DI, CLKI and output CLKO, is determined
by the voltage level on pad DIR. The voltage on pad DIR
must be tied to either V
DD
or V
SS
and must not be switched
when the PCF8801 is operating. The relationship between
the status of pad DIR and the other pads connected to the
shift register is shown in Table 1.
Table 1
280-bit bi-directional shift register pads
Notes
1.
The invalid DI pad must be connected to either V
DD
or
V
SS
.
Pads DO and CLKO are used when PCF8801 devices
are connected in cascade.
The last bit is loaded into a flip-flop whose output is
connected to pad DO. The value of the last bit appears
at pad DO delayed by a
1
2
CLKI period.
2.
3.
Output register
The 280-data bits (SH1_1, SH1_2 to SH140_1, SH140_2)
from the output of the shift register are transferred to the
input of the 280 bit output register. Data is transferred
when either pad LDPI goes HIGH or when pad LDNI goes
LOW. The output register bits are called IO1_1, IO1_2
to IO140_1, IO140_2. The pads that are valid for
inputs LDPI, LDNI, OSCI, and outputs LDPO, LDNO,
OSCO are determined by the voltage level on pad DIR.
During a positive pulse on pad LDPI, pad LDNI must stay
HIGH, or during a negative pulse on pad LDNI, pad LDPI
must stay LOW. The voltage on pad DIR must be tied to
either V
DD
or V
SS
and must not be switched when the
PCF8801 is operating. The relationship between the
status of pad DIR and the other pads connected to the
output register is shown in Table 2.
Table 2
280-bit output register pads
Output multiplexer, frame generator and backplane
drivers
The 280 data bits (IO1_1, IO1_2 to IO140_1, IO140_2)
from the output register are transferred to the input of the
output multiplexer which multiplexes the data at the rate of
1 : 2. The 140 output bits from the output multiplexer are
called OM1 to OM140. The frame generator outputs two
control signals derived from the LCD multiplex clock
(OSCI) called COMMON (
1
2
f
OSC
) and M (
1
4
f
OSC
) which
control the output multiplexer and the backplane drivers.
The operation of the output multiplexer is defined in
Table 3.
SHIFT DIRECTION
VALID PAD
DIR = 1
DIR = 0
Data input DI
(1)
Data output DO
(2)
Clock input CLKI
Clock output CLKO
(2)
First bit shifted
Last bit shifted
(3)
DI1
DO1 and DO2
CLK1
CLK2
SH140_2
SH1_1
DI2
DO1 and DO2
CLK2
CLK1
SH1_1
SH140_2
SHIFT DIRECTION
VALID PAD
DIR = 1
DIR = 0
Data load input LDPI
Data load output LDPO
Data load input LDNI
Data load output LDNO
Multiplexing clock input OSCI
Multiplexing clock output OSCO
LDP1
LDP2
LDN1
LDN2
OSC1
OSC2
LDP2
LDP1
LDN2
LDN1
OSC2
OSC1
相關PDF資料 |
PDF描述 |
|---|---|
| PCF8811 | 80 x 128 pixels matrix LCD driver |
| PCF8812 | CRYSTAL, 8.0 MHZ |
| PCF8812U | CRYSTAL, 8,0 MHZ |
| PCF8813 | (67 + 1) x 102 pixels matrix LCD driver |
| PCF88132 | (67 + 1) x 102 pixels matrix LCD driver |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PCF8811 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80 x 128 pixels matrix LCD driver |
| PCF8811MU/2DA/1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80 x 128 pixels matrix LCD driver |
| PCF8811MU/2DA/1,02 | 制造商:NXP Semiconductors 功能描述:LCD DRVR 1.8V/2.5V Die Waffle 制造商:NXP Semiconductors 功能描述:PCF8811MU/UNCASED/WAFLM//2DA/1 - Gel-pak, waffle pack, wafer, diced wafer on film 制造商:NXP Semiconductors 功能描述:LCD DRVR 1.8V/2.5V Die Waffle Waffle 制造商:NXP Semiconductors 功能描述:IC LCD CTLR/DVR CMOS LP UNCASED 制造商:NXP Semiconductors 功能描述:80 x 128 Pixels Matrix LCD Driver |
| PCF8811U/2DA/1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80 x 128 pixels matrix LCD driver |
| PCF8811U/2DA/1，026 | 制造商:NXP Semiconductors 功能描述:PCF8811U/UNCASED/WAFLM//2DA/1 - Gel-pak, waffle pack, wafer, diced wafer on film 制造商:NXP Semiconductors 功能描述:IC MATRIX LCD DRIVER UNCASED |
發(fā)布緊急采購，3分鐘左右您將得到回復。