
2000 Feb 04
4
Philips Semiconductors
Product specification
LCD driver for 140
×
2 segments
PCF8801
PINNING
Note
1.
These symbols simplify descriptions in this data sheet where several pads have the same function and also indicate
the direction of data on pads which can be selected to be either an input or an output.
SYMBOL
PAD
SIMPLIFIED
SYMBOL
(1)
DESCRIPTION
V
DD1
to V
DD4
28, 27, 3, 4 V
DD
Power supply for output drivers, backplane drivers and LCD
bias generator; 4 pads connected internally
Ground for output drivers, backplane drivers and LCD bias
generator; 4 pads connected internally
Power supply for remaining circuitry; connect externally to
V
DD1
to V
DD4
Ground for remaining circuitry; connect externally to
V
SS1
to V
SS4
Enable internal oscillator input; connected via an external
resistor
Reset input; active HIGH
Test pads; must remain unconnected
First pair of identical 3-level LCD backplane outputs; each
pad is located on opposite sides of the die
Second pair of identical 3-level LCD backplane outputs;
each pad is located on opposite sides of the die
Data direction control input; its voltage level determines the
direction in which data is shifted
LCD driver outputs
Data input; the status of DIR determines which pad is valid;
each pad is located on opposite sides of the die
Data outputs; both identical; both always valid; for cascade
use; each pad is located on opposite sides of the die
Data load control input (LDPI) and output (LDPO) on rising
edge; the status of DIR determines which pad is valid; each
pad is located on opposite sides of the die
Data load control input (LDNI) and output (LDNO) on falling
edge; the status of DIR determines which pad is valid; each
pad is located on opposite sides of the die
Data shift clock input (CLKI) and output (CLKO); the status
of DIR determines which pad is valid; for cascade use; each
pad is located on opposite sides of the die
LCD multiplexing clock input (OSCI) and output (OSCO);
the status of DIR determines which pad is valid; each pad is
located on opposite sides of the die
Internal oscillator outputs; both identical; each pad is
located on opposite sides of the die
V
SS1
to V
SS4
30, 29, 1, 2 V
SS
V
DD5
16
V
DD
V
SS5
15
V
SS
REXT
10
RESET
T1 to T3
COM1_1, COM1_2
14
13, 17, 18
31, 173
COM1
COM2_1, COM2_2
32, 174
COM2
DIR
19
S1 to S140
DI1, DI2
33 to 172
24, 7
DI
DO1, DO2
23, 8
DO
LDP1, LDP2
26, 5
LDPI, LDPO
LDN1, LDN2
25, 6
LDNI, LDNO
CLK1, CLK2
22, 9
CLKI, CLKO
OSC1, OSC2
21, 11
OSCI, OSCO
INT_OSCO1, INT_OSCO2 20, 12
INT_OSCO