參數(shù)資料
型號(hào): PCF8574ATD
英文描述: I/O Port
中文描述: I / O端口
文件頁(yè)數(shù): 3/24頁(yè)
文件大?。?/td> 179K
代理商: PCF8574ATD
1997 Feb 13
3
Philips Semiconductors
Product specification
256 to 1024
×
8-bit CMOS EEPROMs with
I
2
C-bus interface
PCF85xxC-2 family
1
FEATURES
Low power CMOS:
– maximum operating current:
2.0 mA (PCF8582C-2)
2.5 mA (PCF8594C-2)
4.0 mA (PCF8598C-2)
– maximum standby current 10
μ
A (at 6.0 V),
typical 4
μ
A
Non-volatile storage of:
– 2 kbits organized as 256
×
8-bit (PCF8582C-2)
– 4 kbits organized as 512
×
8-bit (PCF8594C-2)
– 8 kbits organized as 1024
×
8-bit (PCF8598C-2)
Single supply with full operation down to 2.5 V
On-chip voltage multiplier
Serial input/output I
2
C-bus
Write operations:
– byte write mode
– 8-byte page write mode
(minimizes total write time per byte)
Read operations:
– sequential read
– random read
Internal timer for writing (no external components)
Power-on-reset
High reliability by using a redundant storage code
Endurance: 1000000 Erase/Write (E/W) cycles at
T
amb
= 22
°
C
10 years non-volatile data retention time
Pin and address compatible to: PCF8570, PCF8571,
PCF8572 and PCF8581.
2
GENERAL DESCRIPTION
The PCF85xxC-2 is a family of floating gate Electrically
Erasable Programmable Read Only Memories
(EEPROMs) with 2, 4 and 8 kbits (256, 512 and
1024
×
8-bit). By using an internal redundant storage code
it is fault tolerant to single bit errors. This feature
dramatically increases the reliability compared to
conventional EEPROMs. Power consumption is low due to
the full CMOS technology used. The programming voltage
is generated on-chip, using a voltage multiplier.
As data bytes are received and transmitted via the serial
I
2
C-bus, a package using eight pins is sufficient. Up to
eight PCF85xxC-2 devices may be connected to the
I
2
C-bus. Chip select is accomplished by three address
inputs (A0, A1 and A2).
Timing of the E/W cycle is carried out internally, thus no
external components are required. Pin 7 (PTC) must be
connected to either V
DD
or left open-circuit. There is an
option of using an external clock for timing the length of an
E/W cycle.
3
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DD
I
DDR
supply voltage
supply current read
2.5
6.0
V
f
SCL
= 100 kHz
V
DD
= 2.5 V
V
DD
= 6 V
f
SCL
= 100 kHz
V
DD
= 2.5 V
V
DD
= 6 V
V
DD
= 2.5 V
V
DD
= 6 V
V
DD
= 2.5 V
V
DD
= 6 V
V
DD
= 2.5 V
V
DD
= 6 V
60
200
μ
A
μ
A
I
DDW
supply current E/W
PCF8582C-2
0.6
2.0
0.8
2.5
1.0
4.0
3.5
10
mA
mA
mA
mA
mA
mA
μ
A
μ
A
PCF8594C-2
PCF8598C-2
I
DD(stb)
standby supply current
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