
2003 Oct 31
7
Philips Semiconductors
Preliminary specification
Controller for power supply
and battery management
PCF50603
7
PINNING
SYMBOL
PIN
SUPPLY
DESCRIPTION
(1)
V
SS
and
REFGND
REC1_N
n.a.
ground and V
SS
pads of all modules are connected to the ground plane of the
package
accessory recognition input with debounce filter (active LOW); input with internal
pull-up resistor to VINT
I
2
C-bus clock input
I
2
C-bus data input and output
32.768 kHz digital clock output; in ACTIVE state and IOVDD is on
control signal input; selects in combination with PWREN1 the ON, OFF or ECO
mode of the linear regulators
control signal input; selects in combination with PWREN2 the ON, OFF or ECO
mode of the linear regulators
SIM reset input from host controller (active LOW)
SIM clock input from host controller
SIM I/O data to or from the host controller with an internal pull-up resistor to
IOVDD
interrupt request output to host controller (active LOW); open-drain output with an
internal pull-up resistor to IOVDD
reset output to host controller (active LOW)
microphone bias output voltage
accessory recognition input with debounce filter and programmable threshold
(active LOW)
IOREG output voltage
IOREG and D2REG input voltage
D2REG output voltage
HCREG output voltage
HCREG input voltage
LPREG output voltage
LPREG and D1REG input voltage
D1REG output voltage
RF1REG output voltage
RF1REG and RF2REG input voltage
RF2REG output voltage
32.768 kHz oscillator output
32.768 kHz oscillator input
On-key (active LOW); input with internal pull-up resistor to VINT
reference voltage bypass capacitor connection
internal supply voltage output
backup battery supply voltage
main battery supply voltage
charger voltage
1
VINT
SCL
SDA
CLK32K
PWREN2
2
3
4
5
IOVDD
IOVDD
IOVDD
IOVDD
PWREN1
6
IOVDD
SIMRSHC_N
SIMCKHC
SIMIOHC
7
8
9
IOVDD
IOVDD
IOVDD
IRQ_N
10
IOVDD
RSTHC_N
MICBIAS
REC2_N
11
12
13
IOVDD
n.a.
MICBIAS
IOVDD
IOD2VBAT
D2VDD
HCVDD
HCVBAT
LPVDD
LPD1VBAT
D1VDD
RF1VDD
RF12VBAT
RF2VDD
OSCO
OSCI
ONKEY_N
REFC
VINT
V
SAVE
V
BAT
V
CHG
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
VINT
VINT
VINT
n.a.
n.a.
n.a.
n.a.
n.a.