參數(shù)資料
型號： PCF2104N
廠商： NXP Semiconductors N.V.
英文描述： LCD controller/driver
中文描述： LCD控制器/驅動器
文件頁數(shù)： 6/56頁
文件大小： 366K
代理商： PCF2104N
1997 Dec 16
6
Philips Semiconductors
Product specification
LCD controller/driver
PCF2104x
7.8
OSC: oscillator
When the on-chip oscillator is used, this pin must be
connected to V
DD
. An external clock signal, if used, is input
at this pin.
7.9
SCL: serial clock line
Input for the I
2
C-bus clock signal.
7.10
SDA: serial data line
Input/output for the I
2
C-bus data line.
7.11
SA0: address pin
The hardware sub-address line is used to program the
device sub-address for 2 different PCF2104xs on the
same I
2
C-bus.
7.12
T1: test pad
Must be connected to V
SS
. Not user accessible.
8
FUNCTIONAL DESCRIPTION
(see Fig.1)
8.1
LCD bias voltage generator
The intermediate bias voltages for the LCD display are
also generated on-chip. This removes the need for an
external resistive bias chain and significantly reduces the
system power consumption. The optimum levels depend
on the multiplex rate and are selected automatically when
the number of lines in the display is defined.
The optimum value of V
OP
depends on the multiplex rate,
the LCD threshold voltage (V
th
) and the number of bias
levels. The relationships are given in Table 1.
Using a 5-level bias scheme for 1 : 16 MUX rate allows
V
OP
< 5 V for most LCD liquids. The effect on the display
contrast is negligible.
Table 1
Optimum values for V
OP
MUX
RATE
NUMBER
OF BIAS
LEVELS
V
OP
/V
th
DISCRIMINATION
V
on
/V
off
1 : 16
1 : 32
5
6
3.67
5.19
1.277
1.196
8.2
Oscillator
The on-chip oscillator provides the clock signal for the
display system. No external components are required.
Pin OSC must be connected to V
DD
.
8.3
External clock
If an external clock is to be used, it must be input at
pin OSC. The resulting display frame frequency is given by
f
frame
=
1
2304
f
osc
. A clock signal must always be present,
otherwise the LCD may be frozen in a DC state.
8.4
Power-on reset
The Power-on reset block initializes the chip after
power-on or power failure.
8.5
Registers
The PCF2104x has two 8-bit registers, an instruction
register (IR) and a data register (DR). The register select
signal (RS) determines which register will be accessed.
The instruction register stores instruction codes such as
display clear and cursor shift, and address information for
the Display Data RAM (DDRAM) and Character Generator
RAM (CGRAM). The instruction register can be written to,
but not read from, by the system controller.
The data register temporarily stores data to be read from
the DDRAM and CGRAM. When reading, data from the
DDRAM or CGRAM (corresponding to the address in the
Address Counter) is written to the data register prior to
being read by the ‘Read data’ instruction.
8.6
Busy Flag
The Busy Flag indicates the free/busy status of the
PCF2104x. Logic 1 indicates that the chip is busy and
further instructions will not be accepted. The Busy Flag is
output at pin DB7 when RS = logic 0 and R/W = logic 1.
Instructions should only be written after checking that the
Busy Flag is at logic 0 or waiting for the required number
of clock cycles.
相關PDF資料
PDF描述
PCF2104NU LCD controller/driver
PCF2105 LCD controller/driver
PCF2105MU LCD controller/driver
PCF26100 Bluetooth Adapter IC
PCF26100ET DVI_D - DVI_D SINGLE LINK CABLE 5M BLK RoHS Compliant: Yes
相關代理商/技術參數(shù)
參數(shù)描述
PCF2104NU 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:LCD controller/driver
PCF2104NU/2 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LCD controller/driver
PCF2104NU/7 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LCD controller/driver
PCF2104X 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LCD controller/driver
PCF2105 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:LCD controller/driver
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*