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參數(shù)資料
| 型號： | PCD5041 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | DECT burst mode controller |
| 中文描述： | TELECOM, CORDLESS, BURST MODE CONTROLLER, PQFP64 |
| 封裝： | 14 X 20 MM, 2.75 MM HEIGHT, PLASTIC, SOT-208-1, QFP-64 |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 134K |
| 代理商： | PCD5041 |
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1996 Oct 31
10
Philips Semiconductors
Objective specification
DECT burst mode controller
PCD5041
Fig.4 Internal clocking scheme of the PCD5041.
handbook, full pagewidth
MBH708
480
bit counter
3.456 MHz system
clock for ADPCM codec
24
slot counter
100 Hz
frame sync
1152 kHz
system/bit clock
clock corrections in this level
unless disabled PCD5041's mode register
COMPARATOR
'SYNC' event
FSx signals
(8 kHz)
16
slot counter
2
144
3
4 (
±
1)
13.824 MHz system clock
6.912 MHz system clock
6.3
Programmable communication controller and
program memory
6.3.1
PCC
The PCC is a RISC-type controller and is used to control
functions which are slot-time accurate. It is well suited for
bit manipulation, and runs at a clock frequency of
6.912 MHz (equivalent to 3.4Mips). After finishing a task, it
switches to a power saving state, from which it returns
after a pre-programmed time.
6.3.2
PCC
FUNCTIONS
The most important functions of the PCC are to:
Perform the appropriate actions on received messages:
PMID and FMID checking, RFPI checking, TBC
handling
Prepare A-field messages for transmission
Prepare the RF-interface for the coming slot
Perform the procedures for RSSI and set-up scan,
maintain scan counters and timers, assemble the RSSI
field in the common data memory
Filter events and indicate them to the microcontroller by
interrupt.
6.4
Speech interface
The speech interface block performs the following
functions:
Connection to a 1152 kbit/s interface in a handset and a
simple base station in the so called ‘12 slot mode’
Autonomous storing/fetching of ADPCM speech data
in/from the PCD5041’s common data memory, using
internal addressing logic
Muting of speech data
Local call.
6.4.1
12-
SLOT MODE
This is the normal operating mode for the PCD5041.
The 12-slot mode is selected if up to 4 ADPCM CODECs
are connected to the PCD5041, where the PCD5041 is the
master of these CODECs. In a handset, or in a simple
base stations which is connected with up to 4 analog lines
to the public network, the PCD5041 is master of the
CODECs. Each CODEC is connected with a separate
framing reference signal (FS1 to FS4) to the PCD5041.
In the QFP64 package, 2 framing signals FS1 and FS2
are available, whereas in the LQFP80 package 4 framing
signals can be used (FS1 to FS4). When more CODECs
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PCD5041H | DECT burst mode controller |
| PCD5041HZ | DECT burst mode controller |
| PCD5042H | DECT burst mode controller |
| PCD5042HZ | DECT burst mode controller |
| PCD5042 | DECT burst mode controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCD5041H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT burst mode controller |
| PCD5041HZ | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT burst mode controller |
| PCD5042 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT burst mode controller |
| PCD5042H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT burst mode controller |
| PCD5042HZ | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT burst mode controller |
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