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參數(shù)資料
| 型號： | PCA9698BS,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 11/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 40B 56HVQFN |
| 產(chǎn)品培訓模塊： | I²C Bus Fundamentals |
| 特色產(chǎn)品： | NXP - I2C Interface |
| 標準包裝： | 1 |
| 接口： | I²C |
| 輸入/輸出數(shù)： | 40 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 1MHz |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 56-HVQFN |
| 包裝： | 標準包裝 |
| 包括： | POR |
| 產(chǎn)品目錄頁面： | 826 (CN2011-ZH PDF) |
| 其它名稱： | 568-3240-6 |
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19
7810C–AVR–10/12
Atmel ATmega328P [Preliminary]
7.4.1
EEPROM Read/Write Access
The EEPROM Access Registers are accessible in the I/O space.
The write access time for the EEPROM is given in Table 7-2. A self-timing function, however,
lets the user software detect when the next byte can be written. If the user code contains instruc-
tions that write the EEPROM, some precautions must be taken. In heavily filtered power
supplies, V
CC is likely to rise or fall slowly on power-up/down. This causes the device for some
period of time to run at a voltage lower than specified as minimum for the clock frequency used.
See “Preventing EEPROM Corruption” on page 19 for details on how to avoid problems in these
situations.
In order to prevent unintentional EEPROM writes, a specific write procedure must be followed.
Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is
executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed.
7.4.2
Preventing EEPROM Corruption
During periods of low V
CC, the EEPROM data can be corrupted because the supply voltage is
too low for the CPU and the EEPROM to operate properly. These issues are the same as for
board level systems using EEPROM, and the same design solutions should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too low. First,
a regular write sequence to the EEPROM requires a minimum voltage to operate correctly. Sec-
ondly, the CPU itself can execute instructions incorrectly, if the supply voltage is too low.
EEPROM data corruption can easily be avoided by following this design recommendation:
Keep the AVR RESET active (low) during periods of insufficient power supply voltage. This can
be done by enabling the internal Brown-out Detector (BOD). If the detection level of the internal
BOD does not match the needed detection level, an external low V
CC reset Protection circuit can
be used. If a reset occurs while a write operation is in progress, the write operation will be com-
pleted provided that the power supply voltage is sufficient.
7.5
I/O Memory
The I/O space definition of the ATmega328P is shown in “Register Summary” on page 326.
All ATmega328P I/Os and peripherals are placed in the I/O space. All I/O locations may be
accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32
general purpose working registers and the I/O space. I/O Registers within the address range
0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the
instruction set section for more details. When using the I/O specific commands IN and OUT, the
I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using
LD and ST instructions, 0x20 must be added to these addresses. The ATmega328P is a com-
plex microcontroller with more peripheral units than can be supported within the 64 location
reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PCA9698DGG | 功能描述:接口-I/O擴展器 I2C I/O EXPANDER GP RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9698DGG,512 | 功能描述:接口-I/O擴展器 I2C I/O EXPANDER GP RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9698DGG,518 | 功能描述:接口-I/O擴展器 40BT I2C FM+TPGPIO IN-RS-PU OE RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9698DGG/S911,51 | 功能描述:接口-I/O擴展器 40BT I2C FM+TPGPIO IN-RS-PU OE RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9698DGG/S911-T | 功能描述:接口-I/O擴展器 40BT I2C FM+TPGPIO IN-RS-PU OE RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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