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參數(shù)資料
型號: PCA9575PW2,118
廠商: NXP Semiconductors
文件頁數(shù): 6/38頁
文件大小: 0K
描述: IC I2C/SMBUS 16BIT GPIO 28TSSOP
產(chǎn)品培訓(xùn)模塊: I²C Bus Fundamentals
特色產(chǎn)品: NXP - I2C Interface
標(biāo)準(zhǔn)包裝: 1
接口: I²C,SM 總線
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時(shí)鐘: 400kHz
電源電壓: 1.1 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 28-TSSOP
包裝: 標(biāo)準(zhǔn)包裝
包括: POR
其它名稱: 568-6647-6
PCA9575_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 9 November 2009
14 of 38
NXP Semiconductors
PCA9575
16-bit I2C-bus and SMBus, level translating, low voltage GPIO
7.6.7 Register 6 - Pull-up/pull-down select port 0 register
When bus-hold feature is not selected and bit 1 of Register 4 is set to logic 1, the I/O
port 0 can be congured to have pull-up or pull-down by programming the
pull-up/pull-down register. Setting a bit to logic 1 will select a 100 k
pull-up resistor for
that I/O pin. Setting a bit to logic 0 will select a 100 k
pull-down resistor for that I/O pin. If
the bus-hold feature is enabled, writing to this register will have no effect on
pull-up/pull-down selection.
7.6.8 Register 7 - Pull-up/pull-down select port 1 register
When bus-hold feature is not selected and bit 1 of Register 5 is set to logic 1, the I/O
port 1 can be congured to have pull-up or pull-down by programming the
pull-up/pull-down register. Setting a bit to logic 1 will select a 100 k
pull-up resistor for
that I/O pin. Setting a bit to logic 0 will select a 100 k
pull-down resistor for that I/O pin. If
the bus-hold feature is enabled, writing to this register will have no effect on
pull-up/pull-down selection.
Table 10.
Register 6 - Pull-up/pull-down select port 0 register (address 06h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
P0.7
R/W
1*
congures I/O port 0 pin to have pull-up or pull-down when
bus-hold feature not selected and bit 1 of Register 4 is logic 1
0 = selects a 100 k
pull-down resistor for that I/O pin
1 = selects a 100 k
pull-up resistor for that I/O pin (default
value)
6
P0.6
R/W
1*
5
P0.5
R/W
1*
4
P0.4
R/W
1*
3
P0.3
R/W
1*
2
P0.2
R/W
1*
1
P0.1
R/W
1*
0
P0.0
R/W
1*
Table 11.
Register 7 - Pull-up/pull-down select port 1 register (address 07h) bit description
Legend: * default value.
Bit
Symbol
Access
Value
Description
7
P1.7
R/W
1*
congures I/O port 1 pin to have pull-up or pull-down when
bus-hold feature not selected and bit 1 of Register 5 is logic 1
0 = selects a 100 k
pull-down resistor for that I/O pin
1 = selects a 100 k
pull-up resistor for that I/O pin (default
value)
6
P1.6
R/W
1*
5
P1.5
R/W
1*
4
P1.4
R/W
1*
3
P1.3
R/W
1*
2
P1.2
R/W
1*
1
P1.1
R/W
1*
0
P1.0
R/W
1*
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