參數(shù)資料
型號(hào): PCA9554N
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 微控制器/微處理器
英文描述: 8-bit I2C and SMBus I/O port with interrupt
中文描述: 8 I/O, PIA-GENERAL PURPOSE, PDIP16
封裝: 0.300 INCH, PLASTIC, MO-001, SOT-38-1, DIP-16
文件頁(yè)數(shù): 6/20頁(yè)
文件大?。?/td> 183K
代理商: PCA9554N
Philips Semiconductors
Product data sheet
PCA9554/PCA9554A
8-bit I
2
C and SMBus I/O port with interrupt
2004 Sep 30
6
SIMPLIFIED SCHEMATIC OF I/O0 TO I/O7
WRITE PULSE
DATA FROM
SHIFT REGISTER
V
DD
I/O0 TO I/O7
V
SS
WRITE
CONFIGURATION
PULSE
D
C
K
FF
Q
D
C
K
Q
FF
D
C
K
Q
FF
D
C
K
Q
FF
INPUT PORT
REGISTER
POLARITY
INVERSION
REGISTER
OUTPUT
PORT
REGISTER
DATA FROM
SHIFT REGISTER
DATA FROM
SHIFT REGISTER
WRITE
POLARITY
PULSE
CONFIGURATION
REGISTER
OUTPUT PORT
REGISTER DATA
INPUT PORT
REGISTER DATA
POLARITY
REGISTER DATA
READ PULSE
SU01472
Q
Q
Q
Q
TO INT
100 k
Q1
Q2
NOTE:
At Power-on Reset, all registers return to default values.
Figure 4. Simplified schematic of I/O0 to I/O7
I/O port
When an I/O is configured as an input, FETs Q1 and Q2 are off,
creating a high-impedance input with a weak pull-up (100 k
typ.) to
V
DD
. The input voltage may be raised above V
DD
to a maximum of
5.5 V.
If the I/O is configured as an output, then either Q1 or Q2 is enabled,
depending on the state of the output port register. Care should be
exercised if an external voltage is applied to an I/O configured as an
output because of the low impedance paths that exist between the
pin and either V
DD
or V
SS
.
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