參數(shù)資料
型號: PCA9550DP
廠商: NXP Semiconductors N.V.
元件分類: LED驅(qū)動器
英文描述: 2-bit I2C-bus LED driver with programmable blink rates
封裝: PCA9550D<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 5, 2005,;PCA9550D<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 5, 2005,;
文件頁數(shù): 21/26頁
文件大小: 150K
代理商: PCA9550DP
PCA9550_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 October 2008
4 of 26
NXP Semiconductors
PCA9550
2-bit I2C-bus LED driver with programmable blink rates
6.
Functional description
6.1 Device address
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9550 is shown in Figure 5. To conserve power, no
internal pull-up resistor is incorporated on the hardware selectable address pin and it must
be pulled HIGH or LOW.
The last bit of the address byte denes the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
6.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9550, which will be stored in the Control register.
The lowest 3 bits are used as a pointer to determine which register will be accessed.
If the Auto-Increment (AI) ag is set, the three low order bits of the Control register are
automatically incremented after a read or write. This allows the user to program the
registers sequentially. The contents of these bits will rollover to ‘000’ after the last register
is accessed.
When the Auto-Increment ag is set (AI = 1) and a read sequence is initiated, the
sequence must start by reading a register different from the input register
(B2 B1 B0
≠ 000).
Only the 3 least signicant bits are affected by the AI ag. Unused bits must be
programmed with zeroes.
Fig 5.
PCA9550 slave address
002aad242
1
0
A0 R/W
fixed
slave address
hardware
selectable
Reset state: 00h
Fig 6.
Control register
002aad243
0
AI
0
B2
B1
B0
register address
Auto-Increment flag
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