參數(shù)資料
型號(hào): PCA9545A
廠商: NXP Semiconductors N.V.
英文描述: 4-channel I2C switch with interrupt logic and reset
中文描述: 4通道的I2C中斷邏輯開關(guān)和復(fù)位
文件頁(yè)數(shù): 6/27頁(yè)
文件大?。?/td> 155K
代理商: PCA9545A
9397 750 14311
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 3 March 2005
6 of 27
Philips Semiconductors
PCA9545A
4-channel I
2
C switch with interrupt logic and reset
7.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9545A, which will be stored in the control register. If multiple bytes are
received by the PCA9545A, it will save the last byte received. This register can be written
and read via the I
2
C-bus.
7.2.1
Control register definition
One or several SCx/SDx downstream pair, or channel, is selected by the contents of the
control register. This register is written after the PCA9545A has been addressed. The
4 LSBs of the control byte are used to determine which channel is to be selected. When a
channel is selected, the channel will become active after a STOP condition has been
placed on the I
2
C-bus. This ensures that all SCx/SDx lines will be in a HIGH state when
the channel is made active, so that no false conditions are generated at the time of
connection.
Remark:
Several channels can be enabled at the same time. Example: B3 = 0, B2 = 1,
B1 = 1, B0 = 0, means that channel 0 and channel 3 are disabled and channel 1 and
channel 2 are enabled. Care should be taken not to exceed the maximum bus capacity.
Fig 6.
Control register
002aab170
INT
3
INT
2
INT
1
INT
0
B3
B2
B1
B0
channel selection bits
(read/write)
7
6
5
4
3
2
1
0
interrupt bits
(read only)
channel 0
channel 1
channel 2
channel 3
INT0
INT1
INT2
INT3
Table 4:
INT3
Control register: Write—channel selection; Read—channel status
INT2
INT1
INT0
B3
B2
B1
B0
0
1
Command
channel 0 disabled
channel 0 enabled
channel 1 disabled
channel 1 enabled
channel 2 disabled
channel 2 enabled
channel 3 disabled
channel 3 enabled
no channel selected;
power-up/reset default state
X
X
X
X
X
X
X
X
X
X
X
X
X
0
1
X
X
X
X
X
X
0
1
X
X
X
X
X
X
0
1
0
X
X
X
0
0
0
0
0
0
0
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