參數(shù)資料
型號(hào)： PCA9518
廠商： NXP Semiconductors N.V.
英文描述： Expandable 5-channel I2C hub
中文描述： 擴(kuò)充5通道的I2C樞紐
文件頁數(shù)： 8/12頁
文件大小： 109K
代理商： PCA9518
Philips Semiconductors
Product data sheet
PCA9518
Expandable 5-channel I
2
C hub
2004 Sep 29
8
AC ELECTRICAL CHARACTERISTICS
1
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
3
UNIT
MIN
105
TYP
202
MAX
389
t
PHLs
Propagation delay
SDA to SDAn or SCL to SCLn
Waveform 1; Note 2
ns
t
PLHs
Propagation delay
SDA to SDAn or SCL to SCLn
Waveform 1; Note 3
110
259
265
ns
t
PHLE1s
Propagation delay
EXPSDA1 to SDA or EXPSCL1 to SCL
Waveform 1
109
193
327
ns
t
PLHE1s
Propagation delay
EXPSDA1 to SDA or EXPSCL1 to SCL
Waveform 1
130
153
179
ns
t
PLHE2s
Propagation delay
EXPSDA2 to SDA or EXPSCL2 to SCL
Waveform 1
160
234
279
ns
t
THLs
t
TLHs
t
SET
t
HOLD
NOTES:
1. The SDA and SCL propagation delays are dominated by rise times or fall times. The fall times are mostly internally controlled and are only
sensitive to load capacitance. The rise times are RC time constant controlled and therefor a specific numerical value can only be given for
fixed RC time constants.
2. The SDA HIGH to LOW propagation delay, t
PLHs
, includes the fall time from V
CC
to 0.5 V
CC
of the EXPSDA1 or EXPSCL1 pins and the SDA
or SCL fall time from the quiescent HIGH (usually V
CC
) to below 0.3 V
CC
. The SDA and SCL outputs have edge rate control circuits included
which make the fall time almost independent of load capacitance.
3. The SDA or SCL LOW to HIGH propagation delay includes the rise time constant from the quiescent LOW to 0.5 V
CC
for the EXPSDA1 or
EXPSCL2, the rise time constant for the quiescent LOW to 0.5 V
CC
for the EXPSDA1 or EXPSCL1, and the rise time constant from the
quiescent external driven LOW to 0.7 V
for the SDA or SCL output. All of these rise times are RC time constants determined by the
external R and total C for the various nodes.
Transition time, SDA/SCL
Waveform 1
58
110
187
ns
Transition time, SDA/SCL
Waveform 1
—
0.85 RC
—
ns
Enable to Start condition
300
—
—
ns
Enable after Stop condition
300
—
—
ns
AC WAVEFORMS
SW01089
0.7 V
CC
0.4 V
t
TLHs
t
THLs
t
PHLs
t
THLs
t
PHLs
EFFECTIVE
STRETCH
t
PLHs
t
PLHE1s
t
PLHE2s
t
PLHs
0.3 V
CC
0.4 V
0.3 V
CC
0.7 V
CC
0.5 V
CC
0.5 V
CC
0.5 V
CC
0.5 V
CC
0.7 V
CC
0.7 V
CC
0.3 V
CC
0.3 V
CC
0.52 V
INPUT
SDA
OR SCL
EXPSDA1
OR
EXPSCL1
EXPSDA2
OR
EXPSCL2
OUTPUT
SDA
OR SCL
Waveform 1.
TEST CIRCUIT
DEFINITIONS
R
L
= Load resistor; 1.1 k
for I
2
C and 500
for EXP.
C
L
= Load capacitance includes jig and probe capacitance;
100 pF for I
2
C and 100 pF for EXP
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
PULSE
GENERATOR
V
IN
D.U.T.
V
OUT
C
L
V
CC
R
L
Test circuit for open-drain outputs
R
T
SW01088
V
CC
Figure 6. Test circuit
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PCA9518AD,118 功能描述:接口-I/O擴(kuò)展器 EXPNDBL 5-CH I2C HUB RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
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