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參數(shù)資料
| 型號： | PCA9507DP,118 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 24B 8TSSOP |
| 產(chǎn)品培訓模塊： | I²C Bus Fundamentals |
| 特色產(chǎn)品： | NXP - I2C Interface |
| 標準包裝： | 1 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 2 輸入，2 輸出 |
| 中斷輸出： | 無 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設(shè)備封裝： | 8-TSSOP |
| 包裝： | 標準包裝 |
| 其它名稱： | 568-5924-6 |
PIC16C77X
DS30275A-page 20
Advance Information
1999 Microchip Technology Inc.
2.2.2.5
PIR1 REGISTER
This register contains the individual flag bits for the
peripheral interrupts.
FIGURE 2-7:
PIR1 REGISTER (ADDRESS 0Ch)
Note:
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
R/W-0
R-0
R/W-0
PSPIF(1)
ADIF
RCIF
TXIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7:
PSPIF(1): Parallel Slave Port Read/Write Interrupt Flag bit
1 = A read or a write operation has taken place (must be cleared in software)
0 = No read or write has occurred
bit 6:
ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
bit 5:
RCIF: USART Receive Interrupt Flag bit
1 = The USART receive buffer is full (cleared by reading RCREG)
0 = The USART receive buffer is empty
bit 4:
TXIF: USART Transmit Interrupt Flag bit
1 = The USART transmit buffer is empty (cleared by writing to TXREG)
0 = The USART transmit buffer is full
bit 3:
SSPIF: Synchronous Serial Port Interrupt Flag bit
1 = The transmission/reception is complete (must be cleared in software)
0 = Waiting to transmit/receive
bit 2:
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused in this mode
bit 1:
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
bit 0:
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
Note 1: PSPIF is reserved on the 28-pin devices, always maintain this bit clear.
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