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| 型號： | PCA9501D,112 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 27/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC I/O EXPANDER I2C 8B 20SOIC |
| 標(biāo)準(zhǔn)包裝： | 38 |
| 接口： | I²C，SM 總線 |
| 輸入/輸出數(shù)： | 8 |
| 中斷輸出： | 是 |
| 頻率 - 時鐘： | 400kHz |
| 電源電壓： | 2.5 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SO |
| 包裝： | 管件 |
| 包括： | EEPROM |
| 配用： | 568-4002-ND - DEMO BOARD I2C |
| 其它名稱： | 568-3353-5 935272364112 PCA9501D |
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PCA9501_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 10 February 2009
8 of 28
NXP Semiconductors
PCA9501
8-bit I2C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM
7.4 Memory operations
7.4.1 Write operations
Write operations require an additional address eld to indicate the memory address
location to be written. The address eld is eight bits long providing access to any one of
the 256 words of memory. There are two types of write operations, ‘byte write’ and ‘page
write’.
Write operation is possible when the Write Control pin (WC) is put at a LOW logic level (0).
When this control signal is set at 1, write operation is not possible and data in the memory
is protected.
‘Byte write’ and ‘page write’ explained below assume that WC is set to 0.
7.4.1.1
Byte write
To perform a byte write, the START condition is followed by the memory slave address and
the R/W bit set to 0. The PCA9501 will respond with an acknowledge and then consider
the next eight bits sent as the word address and the eight bits after the word address as
the data. The PCA9501 will issue an acknowledge after the receipt of both the word
address and the data. To terminate the data transfer the master issues the STOP
condition, initiating the internal write cycle to the non-volatile memory. Only write and read
operations to the quasi-bidirectional I/Os are allowed during the internal write cycle.
Fig 10. Application of multiple PCA9501s with interrupt
Fig 11. Interrupt generated by a change of input to IO5
002aad293
VDD
MICROCONTROLLER
INT
PCA9501
INT
PCA9501
INT
device 1
device 2
PCA9501
INT
device 16
1
A
S
slave address (I/O expander)
START condition
R/W
acknowledge
from slave
002aad294
1
data from port
1
12345678
SCL
9
SDA
data into IO5
INT
A5 A4 A3 A2 A1 A0
0
IO5
P
STOP
condition
tv(INT)
trst(INT)
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