參數(shù)資料
型號(hào)： PCA8591T
廠商： NXP Semiconductors N.V.
英文描述： 8-bit A/D and D/A converter
中文描述： 8位A / D和D / A轉(zhuǎn)換器
文件頁(yè)數(shù)： 13/28頁(yè)
文件大?。?/td> 221K
代理商： PCA8591T
1998 Jul 02
13
Philips Semiconductors
Product specification
8-bit A/D and D/A converter
PCF8591
8
CHARACTERISTICS OF THE I
2
C-BUS
The I
2
C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data
line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data
transfer may be initiated only when the bus is not busy.
8.1
Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period
of the clock pulse as changes in the data line at this time will be interpreted as a control signal.
8.2
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH, is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH, is
defined as the stop condition (P).
Fig.11 Bit transfer.
handbook, full pagewidth
MBC621
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig.12 Definition of START and STOP condition.
handbook, full pagewidth
MBC622
SDA
SCL
P
STOP condition
SDA
SCL
S
START condition
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