參數(shù)資料
型號: PCA2002
廠商: NXP Semiconductors N.V.
英文描述: 32 kHz watch circuit with programmable output period and pulse width
中文描述: 32千赫的可編程輸出和脈沖寬度的手表電路
文件頁數(shù): 7/20頁
文件大?。?/td> 124K
代理商: PCA2002
2004 Jan 20
7
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
output period and pulse width
PCA2002
There are four different instruction states:
State 1; measurement of the crystal oscillator frequency
(divided by 1024)
State 2; measurement of the inhibition time
State 3; write/check word A
State 4; write/check word B.
Each instruction state is switched on with a pulse to
V
P(start)
. After this large pulse, an initial waiting time of t
0
is
required. The programming instructions are then entered
by modulating the supply voltage with small pulses of an
amplitude V
P(mod)
and pulse width t
mod
. The first small
pulse defines the start time, the following pulses perform
three different functions, depending on the time delay (t
d
)
from the preceding pulse (see Fig.6):
t
d
= t
1
(0.7 ms); increments the instruction counter
t
d
= t
2
(1.7 ms); clocks the shift register with D = 0 at the
input
t
d
= t
3
(2.7 ms); clocks the shift register with D = 1 at the
input.
The programming procedure requires a stable oscillator,
which means that a waiting time, determined by the
start-up time of the oscillator, is necessary after power-up
of the circuit.
After the V
P(start)
pulse, the instruction counter is in state 1
and the data shift register is cleared. The instruction state
ends with a second pulse to V
P(start)
or with the pulse to
V
store
. In any event the instruction states are terminated
automatically 2 seconds after the last V
P(mod)
pulse.
M
EASUREMENT OF OSCILLATOR FREQUENCY AND INHIBIT TIME
The output of the two measuring states can either be
monitored directly at pin RESET or as a modulation of the
supply current (a modulating resistor of 30 k
is
connected between V
DD
and V
SS
when the signal at pin
RESET is HIGH):
State 1; crystal oscillator frequency divided by 1024;
state 1 starts with a pulse to V
P(start)
and ends with a
second pulse to V
P(stop)
State 2; inhibition time (see Fig.7); a frequency with the
period of (31.25 + n
×
0.122) ms appears at pin RESET
and as current modulation at the supply pin.
P
ROGRAMMING THE MEMORY CELLS
Applying the two-stage programming pulse (see Fig.8)
transfers the stored data in the shift register to the OTP
cells.
Perform the following to programme a memory word:
1.
Starting with a V
P(start)
pulse, wait for the time period t
0
then set the instruction counter to the word to be
written (t
d
= t
1
)
2.
Enter the data to be stored into the shift register (t
d
= t
2
or t
3
), LSB first (bit 8) and MSB last (bit 1)
3.
Applying the two-stage programming pulse V
pre-store
followed by V
store
stores the word. The delay between
the last data bit and the pre-store pulse V
pre-store
is
t
d
= t
4
. Store the word by raising the supply voltage to
V
store
(9.9 V for 100 ms); the delay between the last
data bit and the store pulse is t
d
= t
4
(0.2 ms).
The example shown in Fig.8 performs the following
functions: start, setting the instruction counter to state 4
(word B), entering data word 110101 into the shift register
(sequence: LSB first and MSB last) and writing the OTP
cells for word B.
handbook, halfpage
VP(start)
VP(mod)
VP(stop)
t1
tp(start)
t0
VSS
VDD(nom)
MGU719
tp(stop)
Fig.6
Supplyvoltagemodulationforstartandstop
of instruction state 2.
handbook, halfpage
VDD
31.25 ms + Inhibtion time
VSS
MGU720
Fig.7
Output waveform at pin RESET for
instruction state 2.
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