參數(shù)資料
型號(hào): PCA200110AA
廠商: NXP Semiconductors N.V.
英文描述: 32 kHz watch circuit with programmable adaptive motor pulse
中文描述: 32千赫的可編程自適應(yīng)脈沖馬達(dá)手表電路
文件頁(yè)數(shù): 9/19頁(yè)
文件大?。?/td> 120K
代理商: PCA200110AA
2003 Dec 17
9
Philips Semiconductors
Product specification
32 kHz watch circuit with programmable
adaptive motor pulse
PCA2000; PCA2001
Programming procedure
For a watch it is essential that the timing calibration can be
made after the watch is fully assembled. In this situation,
the supply pads are often the only terminals which are still
accessible.
Writing to the OTP cells and performing the related
functional checks is achieved in the PCA2000; PCA2001
by modulating the supply voltage. The necessary control
circuit consists basically of a voltage level detector, an
instruction counter which determines the function to be
performed, and an 8-bit shift register which allows writing
to the OTP cells of an 8-bit word in one step and acts as a
data pointer for checking the OTP content.
There are five different instruction states (states 3 and 5
are handled as state 4):
State 1: measurement of the quartz crystal oscillator
frequency (divided by 1024)
State 2: measurement of the inhibit time
State 3: write/check word A
State 4: write/check word B
State 5: write/check word C.
Each instruction state is switched on with a pulse to
V
P
(6.7 V). After this large pulse, an initial waiting time of
t
0
(20 ms) is required. The programming instructions are
then entered by modulating the supply voltage with small
pulses (amplitude V
P(mod)
= 0.35 V and pulse width
t
mod
= 30
μ
s). The first small pulse defines the start time,
the following pulses perform three different functions,
depending on the delay from the preceding pulse
(see Figs 7, 8, 11, and 12):
t
1
= 0.7 ms: increments the instruction counter
t
2
= 1.7 ms: clocks the shift register with data = logic 0
t
3
= 2.7 ms: clocks the shift register with data = logic 1.
The programming procedure requires a stable oscillator.
This means that a waiting time, determined by the start-up
time of the oscillator is necessary after power-up of the
circuit.
After the V
P(start)
pulse, the instruction counter is in state 1
and the data shift register is cleared.
The instruction state ends with a second pulse to V
P(stop)
or with a pulse to V
store
.
In any case, the instruction states are terminated
automatically 2 seconds after the last V
DD(mod)
pulse.
Programming the memory cells
Applying the two-stage programming pulse (see Fig.7)
transfers the stored data in the shift register to the OTP
cells.
Perform the following to program a memory word:
1.
Starting with a V
P(start)
pulse wait for the time period t
0
then set the instruction counter to the word you want to
write (t
d
= t
1
).
2.
Enter the data you want to store in the shift register
(t
d
= t
2
or t
3
). Enter the LSB first (bit 8) and the MSB
last (bit 1).
3.
Applythetwo-stageprogrammingpulse(V
pre-store
then
V
store
) stores the word. The delay between the last
data bit and the pre-store pulse (V
pre-store
) is t
d
= t
4
.
The example shown in Fig.7 performs the following
functions:
Start
Setting instruction counter to state 4 (word B)
Entering data word 110101 into the shift register
(sequence: first bit 6 and last bit 1)
Writing to the OTP cells for word B.
General start up sequence
You must follow the sequence below to ensure the correct
operation at start up:
1.
Apply the supply voltage to the circuit.
2.
Wait for at least 2 seconds.
3.
Connect the pad RESET to V
DD
for a minimum of 62
ms (this activates the stop mode).
4.
Disconnect the pad RESET from V
DD
(this resets the
circuit to normal operating mode).
After this sequence the memory contents are read
immediately and the programmed options are set. This
sequence also resets all major circuit blocks and ensures
that they function correctly.
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