參數(shù)資料
型號(hào)： PCA1070
廠商： NXP Semiconductors N.V.
英文描述： Multistandard programmable analog CMOS transmission IC
中文描述： 多標(biāo)準(zhǔn)傳輸可編程模擬CMOS集成電路
文件頁(yè)數(shù)： 9/36頁(yè)
文件大小： 180K
代理商： PCA1070
1997 Jun 20
9
Philips Semiconductors
Product specification
Multistandard programmable analog
CMOS transmission IC
PCA1070
The total gain of the DTMF channel between the DTMF
input and the line LN is as follows:
G
DTMF
= G
ma
+ 6 (dB)
Default G
DTMF
= 15 + 6 = 21 dB
The confidence tone gain (DTMF to QR outputs) is:
With symmetrical drive of earpiece G
CTs
= G
ra
19 (dB)
Default G
CTss
=
6
19 =
25 dB.
At low gain settings (G
ra
<
10 dB), the confidence tone
gain will be slightly higher than the calculated value. This
is caused by a residual signal.
Programming the gain of the ‘sending prog-amp’ and the
‘rec prog-amp’ is given in Table 13.
Receiving channel
The gain of the receiving channel is defined between the
line connection LN and the earpiece outputs QR+ and
QR
. Its voltage gain is default
6 dB (differential drive).
The LN terminal accepts receiving signals up to 1 V (RMS)
for THD = 2%. The outputs may be used to connect
dynamic, magnetic or piezoelectric earpieces with
single-ended or differential drive. The load select bit RFC
is set default to logic 1 to guarantee stable operation in
case of a capacitive load (piezoelectric earpiece). With a
resistive load (dynamic capsule) RFC should be set to
logic 0 via the I
2
C-bus interface to obtain optimum
performance with respect to distortion and bandwidth.
Two levels for hearing protection can be selected via the
I
2
C-bus interface with control bit HPL.
The earpiece arrangements are illustrated in Fig.6.
Fig.6 Earpiece arrangements.
handbook, halfpage
MGE340
QR
+
QR
(a)
symmetrical
(b)
single-ended
QR
+
VSS
QR
The gain of the receiving channel can be programmed
between
19 dB and +11 dB (symmetrical drive) in 1 dB
steps using bit code GRAx (6 bits).
GRAx sets the gain of the ‘rec prog-amp’ (allowed range
G
ra
=
19 dB to +11 dB; default G
ra
=
6 dB).
The total gain of the receiving channel is as follows:
Symmetrical drive G
RS
= G
ra
(dB)
Default G
RS
=
6 dB.
Asymmetrical or single-ended drive G
RA
= G
RS
6 (dB)
Default G
ra
=
6
6 (dB) =
12 dB.
Programming the gain G
ra
of the ‘rec prog-amp’ is given in
Table 13.
Sidetone balance
The PCA1070 has an on-chip anti-sidetone circuit.
An internal balance impedance Z
oss
can be programmed
via the I
2
C-bus interface to match the external line
impedance Z
line
to give optimum sidetone suppression.
Z
oss
= R
sa
+ (R
sb
// C
s
).
Programming the sidetone balance impedance is given in
Tables 14, 15 and 16.
Line current control
The DC line current can be read via the I
2
C-bus interface.
This information can be used for the adaptation of
transmission parameters (for example line loss
compensation, sidetone balance and DC characteristic).
The bit code LCx as a function of line current is given in
Table 17.
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