參數(shù)資料
型號: PC9RS08KA2DWE
廠商: Freescale Semiconductor
文件頁數(shù): 135/136頁
文件大?。?/td> 0K
描述: MCU 8BIT 2KB FLASH RS08 8-SOIC
標(biāo)準(zhǔn)包裝: 98
系列: RS08
核心處理器: RS08
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,WDT
輸入/輸出數(shù): 4
程序存儲器容量: 2KB(2K x 8)
程序存儲器類型: 閃存
RAM 容量: 63 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-SOIC(0.209",5.30mm 寬)
包裝: 管件
配用: DEMO9RS08KA2-ND - DEMO BOARD FOR 9RS08KA2
Chapter 12 Development Support
MC9RS08KA2 Series Data Sheet, Rev. 4
98
Freescale Semiconductor
BDC_RESET command allows host to reset MCU without using a reset pin
One hardware address breakpoint built into BDC
RS08 clock source runs in stop mode if BDM enabled to allow debugging when CPU is in stop
mode
COP watchdog suspended while in active background mode
12.3
RS08 Background Debug Controller (BDC)
All MCUs in the RS08 Family contain a single-wire background debug interface which supports in-circuit
programming of on-chip non-volatile memory and sophisticated debug capabilities. Unlike debug
interfaces on earlier 8-bit MCUs, this debug system provides for minimal interference with normal
application resources. It does not use any user memory or locations in the memory map. It requires use of
only the output-only BKGD pin. This pin will be shared with simple user output-only functions (typically
port, comparator outputs, etc.), which can be easily debugged in normal user mode.
RS08 BDM commands are divided into two groups:
Active background mode commands require that the target MCU is in active background mode (the
user program is not running). The BACKGROUND command causes the target MCU to enter
active background mode. Active background mode commands allow the CPU registers to be read
or written and allow the user to trace one (TRACE1) user instruction at a time or GO to the user
program from active background mode.
Non-intrusive commands can be executed at any time even while the user program is running.
Non-intrusive commands allow a user to read or write MCU memory locations or access status and
control registers within the background debug controller (BDC).
Typically, a relatively simple interface pod is used to translate commands from a host computer into
commands for the custom serial interface to the single-wire background debug system. Depending on the
development tool vendor, this interface pod may use a standard RS-232 serial port, a parallel printer port,
or some other type of communication such as Ethernet or a universal serial bus (USB) to communicate
between the host PC and the pod.
Figure 12-2 shows the standard header for connection of a RS08 BDM pod. A pod is a small interface
device that connects a host computer such as a personal computer to a target RS08 system. BKGD and
GND are the minimum connections required to communicate with a target MCU. The pseudo-open-drain
RESET signal is included in the connector to allow a direct hardware method for the host to force or
monitor (if RESET is available as output) a target system reset.
The RS08 BDM pods supply the VPP voltage to the RS08 MCU when in-circuit programming is required.
The VPP connection from the pod is shared with RESET as shown in Figure 12-2. For VPP requirements
see the FLASH specifications in the electricals appendix.
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PC9RS08KA8CWJ 制造商:Freescale Semiconductor 功能描述:
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