
Appendix G Detailed Register Map
MC9S12XDP512 Data Sheet, Rev. 2.17
1310
Freescale Semiconductor
0x000E–0x000F External Bus Interface (S12XEBI) Map
Address
Name
Bit 7
Bit 6
0
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x000E
EBICTL0
R
W
R
W
ITHRS
HDBE
ASIZ4
ASIZ3
ASIZ2
ASIZ1
ASIZ0
0x000F
EBICTL1
EWAITE
0
0
0
0
EXSTR2
EXSTR1
EXSTR0
0x0010–0x0017 Module Mapping Control (S12XMMC) Map 2 of 4
Address
Name
Bit 7
0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x0010
GPAGE
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
GP6
GP5
GP4
GP3
GP2
GP1
GP0
0x0011
DIRECT
DP15
DP14
DP13
DP12
DP11
DP10
DP9
DP8
0x0012
Reserved
0
0
0
0
0
0
0
0
0x0013
MMCCTL1
0
0
0
0
0
EROMON
ROMHM
ROMON
0x0014
Reserved
0
0
0
0
0
0
0
0
0x0015
Reserved
0
0
0
0
0
0
0
0
0x0016
RPAGE
RP7
RP6
RP5
RP4
RP3
RP2
RP1
RP0
0x0017
EPAGE
EP7
EP6
EP5
EP4
EP3
EP2
EP1
EP0
0x0018–0x001B Miscellaneous Peripheral
Address
Name
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
0x0018
Reserved
R
W
R
W
R
W
R
W
0x0019
Reserved
0
0
0
0
0
0
0
0
0x001A
PARTIDH
1
1
0
0
0
1
0
0
0x001B
PARTIDL
0
0
0
0
0
0
0
0
0x001C–0x001F Port Integration Module (PIM) Map 3 of 5
Address
Name
Bit 7
Bit 6
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
Bit 0
0x001C
ECLKCTL
R
W
NECLK
NCLKX2
EDIV1
EDIV0