
P
2004 National Semiconductor Corporation
www.national.com
PRELIMINARY
March 2004
Revision 1.07
PC87591E, PC87591S and PC87591L
LPC Mobile Embedded Controllers
General Description
The National Semiconductor PC87591E, PC87591S and
PC87591L are highly integrated, embedded controllers with
an embedded-RISC core and integrated advanced func-
tions. These devices are targeted for a wide range of porta-
ble applications that use the Low Pin Count (LPC) interface.
The PC87591S is targeted for security applications and in-
cludes supporting hardware such as the Hardware Random
Number Generator. The PC8591L replaces the on-chip
flash with 4K of boot ROM for value solutions using shared
BIOS architecture. “PC87591x” refers to all the devices.
The PC87591x incorporates National’s CompactRISC
CR16B core (a high-performance 16-bit RISC processor),
on-chip flash (ROM for the PC87591L) and RAM memories,
system support functions and a Bus Interface Unit (BIU) that
directly interfaces with optional external memory (such as
flash) and I/O devices.
System support functions include: WATCHDOG and other
timers, interrupt control, general-purpose I/O (GPIO) with
internal
keyboard
matrix
scanning,
ACCESS.bus
interface, high accuracy analog-to-digital
(ADC) and digital-to-analog converters (DAC) for battery
charging, system control, system health monitoring and an-
alog controls.
PS/2
Interface,
The PC87591x interfaces with the host via an LPC interface
that provides the host with access to the Keyboard and em-
bedded controller interface channels, integrated functions,
Real-Time Clock (RTC), BIOS firmware and security func-
tions.
Like members of National’s SuperI/O family, the PC87591x
is PC01 and ACPI compliant.
Outstanding Features
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Host interface, based on Intel’s
LPC Interface Specifi-
cation Revision 1.0
, September 29th, 1997
PC01 Rev 1.0, and ACPI 2.0 compliant
16-bit RISC core, with 2 Mbyte address space, and
running at up to 20 MHz
Software and Hardware controlled clock throttling
Shared BIOS flash memory (internal and/or external)
Y2K-compliant RTC
84/117 GPIO ports (for 128-pin/176-pin packages)
with a variety of wake-up events
Extremely low current consumption in Idle mode
JTAG-based debugger interface
128-pin
and
176-pin
options,
(PC87591L is 176-pin only)
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in
LQFP
package
Block Diagram
Core Bus
Peripheral Bus
Bus
Adapter
KBC + PM
Host I/F
RTC
Processing
Unit
RAM
External
Memory + I/O
BIU
CR16B Core
32.768 KHz
ICU
HFCG
PMC
ADC
ACB
(X2)
GPIO
WDG
FLASH or ROM
MIWU
MFT16
(X2)
Timer +
PS/2
I/F
CLK
DAC
Memory
Debugger
I/F
Shared mem.
+ Security
LPC
I/F
Serial
IRQ
SMI
Functions
Internal Bus
CR Access
Bridge
DMA
JTAG
KBSCAN +
ACM
USART
Peripherals
LPC Bus I/F
I/F Functions
PWM
Reset &
Config
MSWC
Controlled
Host
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