參數(shù)資料
型號(hào)： PC7457VGU933N
廠商： Atmel Corp.
英文描述： PowerPC 7457 RISC Microprocessor
中文描述： 7457的PowerPC RISC微處理器
文件頁數(shù)： 58/66頁
文件大?。?/td> 522K
代理商： PC7457VGU933N
58
PC7457/47 [Preliminary]
5345B–HIREL–02/04
Figure 33.
JTAG Interface Connection
Notes:
1. RUN/STOP, normally found on pin 5 of the COP header, is not implemented on the PC7457. Connect pin 5 of the COP
header to OV
DD
with a 10 k
pull-up resistor.
2. Key location; pin 14 is not physically present on the COP header.
3. Component not populated. Populate only if debug tool does not drive QACK.
4. Populate only if debug tool uses an open-drain type output and does not actively deassert QACK.
5. If the JTAG interface is implemented, connect HRESET from the target source to TRST from the COP header though an
AND gate to TRST of the part. If the JTAG interface is not implemented, connect HRESET from the target source to TRST of
the part through a 0
isolation resistor.
6. Though defined as a No-Connect, it is a common and recommended practice to use pin 12 as an additional GND pin for
improved signal integrity.
HRESET
HRESET
HRESET
13
SRESET
SRESET
SRESET
11
VDD_SENSE
6
5
(1)
15
2 k
10 k
10 k
10 k
OVDD
OVDD
CHKSTP_OUT
OVDD
OVDD
CHKSTP_IN
CHKSTP_IN
8
TMS
TDO
TDI
TCK
TMS
TDO
TDI
TCK
9
1
3
4
TRST
7
16
2
10
14
(2)
Key
QACK
OVDD
OVDD
OVDD
TRST
10 k
10 k
10 k
10 k
OVDD
QACK
QACK
CHKSTP_OUT
3
13
9
5
1
6
10
2
15
11
7
16
12
8
4
KEY
No Pin
COP Connector
Physical Pin Out
10 k
(4)
OVDD
2 k
(3)
0
(5)
12
(6)
NC
From Target
Board Sources
(if any)
C
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