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參數(shù)資料
| 型號： | PC48F0P0VB00 |
| 廠商： | Intel Corp. |
| 英文描述： | Photoelectric Sensor; Sensor Input Type:Optical; Sensing Range Max:5m; Sensor Output Type:Relay; Leaded Process Compatible:No; Output Type:Relay; Peak Reflow Compatible (260 C):No; Contact Current Max:3A; Contact Rating:3A |
| 中文描述： | 英特爾StrataFlash嵌入式存儲器 |
| 文件頁數(shù)： | 84/102頁 |
| 文件大?。?/td> | 1609K |
| 代理商： | PC48F0P0VB00 |
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1-Gbit P30 Family
April 2005
84
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
5.
The Clear Status command only clears the error bits in the status register if the device is not in the following modes: WSM
running (Pgm Busy, Erase Busy, Pgm Busy In Erase Suspend, OTP Busy, BEFP modes).
BEFP writes are only allowed when the status register bit #0 = 0, or else the data is ignored.
The "current state" is that of the "chip" and not of the "partition"; Each partition "remembers" which output (Array, ID/CFI or
Status) it was last pointed to on the last instruction to the "chip", but the next state of the chip does not depend on where
the partition's output mux is presently pointing to.
Confirm commands (Lock Block, Unlock Block, Lock-Down Block, Configuration Register) perform the operation and then
move to the Ready State.
WA0 refers to the block address latched during the first write cycle of the current operation.
6.
7.
8.
9.
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| PC48F4P0VB00 | SO60-Q08 |
| PC48F4400P0VT00 | Intel StrataFlash Embedded Memory |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PC48F0P0VBQ0 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory |
| PC48F0P0VT00 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory |
| PC48F0P0VTQ0 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory |
| PC48F0P0ZB00 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory |
| PC48F0P0ZBQ0 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel StrataFlash Embedded Memory |
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