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參數(shù)資料
| 型號(hào)： | PC33710EWR2 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | Dual Output DC-DC & Linear Regulator IC |
| 中文描述： | 雙輸出DC - DC |
| 文件頁數(shù)： | 3/17頁 |
| 文件大?。?/td> | 410K |
| 代理商： | PC33710EWR2 |
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
34710
TERMINAL CONNECTIONS
TERMINAL CONNECTIONS
Figure 3. 34710 Terminal Connections
Table 1. 34710 Terminal Definitions
Terminal
Number
Terminal
Name
Terminal
Function
Formal Name
Definition
1
RST
Reset
Reset
Reset is an open drain output only.
2
3
4
Mode0
Mode1
Mode2
Input
Mode Control
These input terminals control V
FB
and
V
CORE
output voltages.
5 – 12,
14 –22, 24
NC
NC
No Connects
No internal connection to this terminal.
13
GND
Ground
Ground
Ground.
23
VCORE
Output
Core Voltage
Regulator Output
Core regulator output voltage.
25
LINB+
Input
Core Voltage
Regulator Input
Core regulator input voltage.
26
VFB
Input
V
I/O
Switching
Regulator
Feedback
Feedback terminal for V
I/O
switching regulator and internal logic supply.
27
VSWITCH
Output
V
I/O
Switching
Regulator Switch
Output
V
I/O
switching regulator switching output.
28
B+
Input
Power Supply
Input
Regulator input voltage.
29
VB
Output
Boost Voltage
Boost voltage storage node.
30
CP2
Passive
Component
CP Capacitor
Positive
Charge pump capacitor connection 2.
31
CP1
Passive
Component
CP Capacitor
Negative
Charge pump capacitor connection 1.
32
CT
Passive
Component
Reset Delay
Capacitor
Reset delay adjustment capacitor.
1
8
9
10
11
12
13
14
15
16
3
4
5
6
7
2
32
25
24
23
22
21
20
19
18
17
30
29
28
27
26
31
CT
CP1
CP2
VB
B+
VSWITCH
VFB
LINB+
N/C
VCORE
N/C
N/C
N/C
N/C
N/C
N/C
RST
MODE0
MODE1
MODE2
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
GND
N/C
N/C
N/C
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