參數(shù)資料
型號: PC107AVZFU100LD
廠商: ATMEL CORP
元件分類: 外設(shè)及接口
英文描述: PCI Bridge Memory Controller
中文描述: MULTIFUNCTION PERIPHERAL, PBGA503
封裝: 33 X 33 MM, 1.27 MM PITCH, PLASTIC, FLIP CHIP, BGA-503
文件頁數(shù): 4/50頁
文件大?。?/td> 453K
代理商: PC107AVZFU100LD
4
PC107A [Preliminary]
2137C–HIREL–03/04
Message Unit
Two doorbell registers
An extended doorbell register mechanism that facilitates interprocessor
communication through interrupts in a dual-local-processor system
Two inbound and two outbound messaging registers
I
2
O message controller
Two-wire Interface Controller with Full Master/Slave Support (Except Broadcast All)
Embedded Programmable Interrupt Controller (EPIC)
Five hardware interrupts (IRQs) or 16 serial interrupts
Four programmable timers
Integrated PCI Bus, CPU, and SDRAM Clock Generation
Programmable PCI Bus, 60x, and Memory Interface Output Drivers
Dynamic Power Management – Supports 60x Nap, Doze, and Sleep Modes
Programmable Input and Output Signals with Watchpoint Capability
Built-in PCI Bus Performance Monitor Facility
Debug Features
Error injection/capture on data path
IEEE 1149.1 (JTAG)/test interface
Processor Interface
Supports up to two PowerPC
TM
microprocessors with 60x bus interface
Supports various operating frequencies and bus divider ratios
32-bit address bus, 64/32-bit data bus supported at 100 MHz
Supports full memory coherency
Supports optional local bus slave
Decoupled address and data buses for pipelining of 60x accesses
Store gathering on 60x-to-PCI writes
Concurrent transactions on 60x and PCI buses supported
Supports direct mode or chaining mode (automatic linking of DMA transfers)
Supports scatter gathering-read or write discontinuous memory
Interrupt on completed segment, chain, and error
Local-to-local memory
PCI-to-PCI memory
PCI-to-local memory
PCI memory-to-local memory
相關(guān)PDF資料
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PC107AVGHU100L PCI Bridge Memory Controller
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