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參數(shù)資料
| 型號： | PACE1754-20PGMB |
| 廠商： | PYRAMID SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, CPGA68 |
| 封裝： | PGA-68 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大小： | 143K |
| 代理商： | PACE1754-20PGMB |
PACE1754/SOS
Page 11 of 16
Document # MICRO-9 REV B
PIN FUNCTIONS (Continued)
Symbol
Name
Description
R/
W
Read or Write
An input qualifier indicating the nature of the current bus cycle, either
Read (1) or Write (0).
RESET
External Reset
An active LOW input used to initialize the device's hardware.
TEST ON
System Test Enable
An active LOW input used to enable the execution of the System Test
built into the device, immediately after completion of the P1750A/AE
initialization and before fetching any instruction from the user
program.
TEST END
System Test End
An active HIGH output indicating whether the system test in the
device has been completed. Whenever the system test is disabled
by the
TEST ON signal, the TEST END output will be at a logical "1"
immediately after RESET is removed.
STRT ROM
Start Up ROM
An output following the execution of the ESUR and DSUR, I/O
commands as defined in MIL-STD-1750A. It will be at the logical "1"
level after executing ESUR and at the logical "0" level after executing
DSUR. Initially, it defaults to a logical "1".
RDYD
Ready Data
An active HIGH output to be connected to the P1750A/AE input to
control the bus cycle termination.
EX RDY
External Ready Data
An active HIGH input which at logical "0" overrides the internal RDYD
generation and forces it to a logical "0".
EX RDY1
External Ready Data
An active LOW input which at logical "1" overrides the internal RDYD
generation and forces it to a logical "0".
ME PA ER/
Memory Parity Error
An active LOW output indicating a parity error when reading from
RAM DIS
memory. It becomes an active HIGH output called RAM DISABLE for
handshaking with the P1753 MMU when the device is programmed to
support EDAC.
EX AD ER/
Illegal Address Error
An active LOW output indicating an illegal address error when
SING ERR
referencing memory or I/O. It becomes an active HIGH output called
SINGLE ERROR for handshaking with the P1753 MMU when the
device is programmed to support EDAC.
TC
Terminal Count
An active HIGH output indicating a Bus time out or a watchdog
trigger.
SC0–SC4
System Configuration
Inputs which are buffered onto IB0–IB4 when executing an I/O read
from I/O address 8410 (hex), system configuration.
GND
Ground
0 volts system ground.
VCC
Power Supply
5 volts ± 10% power supply.
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