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參數(shù)資料
| 型號： | PAC7101 |
| 廠商： | 飛思卡爾半導體(中國)有限公司 |
| 英文描述： | Microcontroller Family Hardware Specifications |
| 中文描述： | 微控制器系列硬件規(guī)格 |
| 文件頁數(shù)： | 53/56頁 |
| 文件大?。?/td> | 471K |
| 代理商： | PAC7101 |
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Mechanical Information
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Freescale Semiconductor
53
v1.0
14-Sep-04
(continued)
Section 3, “Electrical Characteristics”
(continued)
Section 3.10, “Analog-to-Digital Converter”
— Rev. 0.1 redundant and superfluous content deleted
– Section 3.10.3, “ATD Electrical Specifications,” (included Table 29 and Table 30)
– Table 31, “ATD Performance Specifications” (redundant with v0.1 Table 27 and
Table 28, now
Table 29
and
Table 30
)
—
Table 26
updates
– Deleted previous spec M6
– Changed spec
N7
and
N8
values
—
Table 27
updates
– Deleted previous spec N6
– Changed spec
P7
and
P8
values
– Changed spec
P2
and footnote (
1
) to specify 3.15 V
—
Table 28
updates
– Changed spec
Q2
parameter classification from T to C and 10 pF and 22 pF values
moved from maximum to typical
—
Table 29
updates
– Operating conditions V
DD
A minimum changed to 4.5 V
– V
REF
description moved from “conditions” header to new footnote (
1
)
—
Table 30
updates
– Operating conditions V
DD
A minimum changed to 3.15 V
– V
REF
description moved from “conditions” header to new footnote (
1
)
—
Table 31
updates
– Spec
T1
description clarified, max removed, min added with footnote
– Spec
T2
modified to show both edge- and level-sensitive modes
—
Figure 10
modified to remove “Max Frequency” label and clearly separate edge- and
level-sensitive mode timing examples
Section 3.11, “Serial Peripheral Interface”
—
Table 32
updates
– Changed specs
U1a
,
U1b
and
U4
to use
f
IPS
and t
IPS
for clarity and consistency with
MAC7100RM
– Changed
U1a
max to and
U1b
min to 2 to account for the DBR bit
—
Table 33
updates
– Changed specs
V1a
,
V1b
,
V2
,
V3
,
V4
,
V7
,
V8
to use
f
IPS
and t
IPS
for clarity and
consistency with MAC7100RM
– Changed
V1a
max to and
V1b
min to 2 to account for the DBR bit
Section 3.13, “Common Flash Module”
— Significant rework to match MAC7100RM clock naming, references and timing
calculations for clarity and consistency
— Changed
X1
maximum from 40 MHz to 50 MHz (
Table 35
)
24
24
24
25
26
26
28
28
29
29
32
to
35
34
Revision History (continued)
Version No.
Release Date
Description of Changes
Page
Numbers
相關PDF資料 |
PDF描述 |
|---|---|
| PAC7106 | Microcontroller Family Hardware Specifications |
| PAC7111 | Microcontroller Family Hardware Specifications |
| PAC7112 | Microcontroller Family Hardware Specifications |
| PAC7116 | Microcontroller Family Hardware Specifications |
| PAC7121 | Microcontroller Family Hardware Specifications |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PAC7106 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
| PAC7111 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
| PAC7112 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
| PAC7116 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
| PAC7121 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller Family Hardware Specifications |
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