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    參數(shù)資料
    型號(hào): PA28F800BV-T80
    廠商: INTEL CORP
    元件分類: PROM
    英文描述: 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
    中文描述: 1M X 8 FLASH 5V PROM, 80 ns, PDSO44
    封裝: 0.525 X 1.110 INCH, PLASTIC, SOP-44
    文件頁數(shù): 27/55頁
    文件大?。?/td> 638K
    代理商: PA28F800BV-T80
    E
    3.6.2
    2-MBIT SmartVoltage BOOT BLOCK FAMILY
    27
    SEE NEW DESIGN RECOMMENDATIONS
    V
    CC
    , V
    PP
    AND RP# TRANSITIONS
    The CUI latches commands as issued by
    system
    software and is not altered by V
    PP
    or CE#
    transitions or WSM actions. Its default state upon
    power-up, after exit from deep power-down mode,
    or after V
    CC
    transitions above V
    LKO
    (lockout
    voltage), is read array mode.
    After any word/byte program or block erase
    operation is complete and even after V
    PP
    transitions
    down to V
    PPLK
    , the CUI must be reset to read array
    mode via the Read Array command if accesses to
    the flash memory are desired.
    Please refer to Intel’s application note
    AP-617
    Additional Flash Data Protection Using V
    PP
    , RP#,
    and WP#
    for a circuit-level description of how to
    implement the protection discussed in Section 3.6.
    3.7
    Power Supply Decoupling
    Flash memory’s power switching characteristics
    require careful device decoupling methods. System
    designers should consider three supply current
    issues:
    1.
    Standby current levels (I
    CCS
    )
    2.
    Active current levels (I
    CCR
    )
    3.
    Transient peaks produced by falling and rising
    edges of CE#.
    Transient current magnitudes depend on the device
    outputs’ capacitive and inductive loading. Two-line
    control and proper decoupling capacitor selection
    will suppress these transient voltage peaks. Each
    flash device should have a 0.1 μF ceramic
    capacitor connected between each V
    CC
    and GND,
    and between its V
    PP
    and GND. These high-
    frequency, inherently low-inductance capacitors
    should be placed as close as possible to the
    package leads.
    3.7.1
    V
    TRACE ON PRINTED CIRCUIT
    BOARDS
    Designing for in-system programming of the flash
    memory requires special consideration of the V
    PP
    power supply trace by the printed circuit board
    designer. The V
    PP
    pin supplies the flash memory
    cells current for programming and erasing. One
    should use similar trace widths and layout
    considerations given to the V
    CC
    power supply trace.
    Adequate V
    PP
    supply traces, and decoupling
    capacitors placed adjacent to the component, will
    decrease spikes and overshoots.
    NOTE:
    Table headings in the DC and AC characteristics tables (i.e., BV-60, BV-80, BV-120, TBV-80, TBE-
    120) refer to the specific products listed below.
    See Section 5.0 for more information on product
    naming and line items.
    Abbreviation
    Applicable Product Names
    BV-60
    E28F002BV-T60, E28F002BV-B60, PA28F200BV-T60, PA28F200BV-B60,
    E28F200CV-T60, E28F200CV-B60, E28F200BV-T60, E28F200BV-B60
    BV-80
    E28F002BV-T80, E28F002BV-B80, PA28F200BV-T80, PA28F200BV-B80,
    E28F200CV-T80, E28F200CV-B80, E28F200BV-T80, E28F200BV-B80
    BV-120
    E28F002BV-T120, E28F002BV-B120, PA28F200BV-T120, PA28F200BV-B120
    TBV-80
    TE28F002BV-T80, TE28F002BV-B80, TB28F200BV-T80, TB28F200BV-B80,
    TE28F200CV-T80, TE28F200CV-B80, TE28F200BV-T80, TE28F200BV-B80
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