參數(shù)資料
型號(hào): P912XDP512F0VAG
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Covers, S12XD, S12XB & S12XA Families
中文描述: 封面,S12XD,S12XB
文件頁(yè)數(shù): 282/1350頁(yè)
文件大?。?/td> 3951K
代理商: P912XDP512F0VAG
Chapter 6 XGATE (S12XGATEV2)
SUBL
MC9S12XDP512 Data Sheet, Rev. 2.17
282
Freescale Semiconductor
Operation
RD – $00:IMM8
RD
Subtracts an immediate 8 bit constant from the content of register RD using binary subtraction and stores
the result in the destination register RD.
CCR Effects
Code and CPU Cycles
Subtract Immediate 8 bit Constant
(Low Byte)
SUBL
N
Z
V
C
N:
Z:
V:
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two′s complement overflow resulted from the 8 bit operation; cleared otherwise.
RD[15]
old
& RD[15]
new
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
old
& RD[15]
new
C:
Source Form
Address
Mode
Machine Code
Cycles
SUBL RD, #IMM8
IMM8
1
1
0
0
0
RD
IMM8
P
相關(guān)PDF資料
PDF描述
P912XDP512F0VAGR Covers, S12XD, S12XB & S12XA Families
P912XDP512F0VAL Covers, S12XD, S12XB & S12XA Families
P912XDP512F0VALR Covers, S12XD, S12XB & S12XA Families
P912XDP512F0VFU Covers, S12XD, S12XB & S12XA Families
P912XDP512F0VFUR Covers, S12XD, S12XB & S12XA Families
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