參數(shù)資料
型號(hào)： P90CL301BFH
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Low voltage 16-bit microcontroller
中文描述： 16-BIT, 27.02 MHz, MICROCONTROLLER, PQFP80
文件頁數(shù)： 58/92頁
文件大?。?/td> 526K
代理商： P90CL301BFH
1996 Dec 11
58
Philips Semiconductors
Preliminary specification
Low voltage 16-bit microcontroller
P90CL301BFH (C100)
17 REGISTER MAPPING
The internal register map of the P90CL301BFH is summarized in Table 92. Note that the internal registers can be
accessed:
only in Supervisor mode for version P90CL301BFH-3/4
both in Supervisor and User mode for version P90CL301BFH-5.
Table 92
Register map
ADDRESS
(HEX)
SYMBOL
WIDTH
(1)
STATE AFTER
RESET
(HEX)
(2)
REGISTER
ACCESS
(3)
System register
FFFF 8000
SYSCON
W
00C0
System Control Register
R/W
Interrupt registers
FFFF 8101
FFFF 8103
FFFF 8105
FFFF 8107
FFFF 810F
LIR0
LIR1
LIR2
LIR3
PIFR
B
B
B
B
B
00
00
00
00
00
Latched Interrupt 0/1 Register
Latched Interrupt 2/3 Register
Latched Interrupt 4/5 Register
Latched Interrupt 6/7 Register
Pending Interrupt Flag Register
R/W
R/W
R/W
R/W
R/C
I
2
C-bus registers
FFFF 8201
FFFF 8203
FFFF 8205
FFFF 8207
SDAT
SADR
SSTA
SCON
B
B
B
B
00
00
F8
00
I
2
C-bus Data Register
I
2
C-bus Address Register
I
2
C-bus Status Register
I
2
C-bus Control Register
R/W
R/W
R
R/W
Timers registers
FFFF 8300
FFFF 8301
FFFF 8302
FFFF 8304
FFFF 8306
FFFF 8308
FFFF 830A
FFFF 830D
FFFF 830F
FFFF 8310
FFFF 8311
FFFF 8312
FFFF 8314
FFFF 8316
FFFF 8318
FFFF 831A
FFFF 831D
T0CRH
T0CRL
T0RR
T0
T0C0
T0C1
T0C2
T0SR
T0PR
T1CRH
T1CRL
T1RR
T1
T1C0
T1C1
T1C2
T1SR
B/W
B
W
W
W
W
W
B
B
B/W
B
W
W
W
W
W
B
0000
00
0000
0000
XXXX
XXXX
XXXX
X
0
00
0000
00
0000
0000
XXXX
XXXX
XXXX
X
0
Timer 0 Control Register (High byte)
Timer 0 Control Register (Low byte)
Timer 0 Reload Register
Timer 0 Register
Timer 0 Channel 0 Register
Timer 0 Channel 1 Register
Timer 0 Channel 2 Register
Timer 0 Status Register
Timer 0 Prescaler Reload Register
Timer 1 Control Register (High byte)
Timer 1 Control Register (Low byte)
Timer 1 Reload Register
Timer 1 Register
Timer 1 Channel 0 Register
Timer 1 Channel 1 Register
Timer 1 Channel 2 Register
Timer 1 Status Register
R/W
R/W
W
R
R/W
R/W
R/W
R/C
W
R/W
R/W
W
R
R/W
R/W
R/W
R/C
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