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參數(shù)資料
| 型號： | P89LPC972FDH,129 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 13/66頁 |
| 文件大小： | 0K |
| 描述： | MCU 80C51 8KB FLASH 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 系列： | LPC900 |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 18MHz |
| 連通性： | I²C，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 18 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.4 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 包裝： | 管件 |
| 其它名稱： | 568-8748-5 P89LPC972FDH,129-ND |
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P89LPC97X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 3 — 8 June 2010
20 of 66
NXP Semiconductors
P89LPC970/971/972
8-bit microcontroller with accelerated two-clock 80C51 core
7.5 Clock output
The P89LPC970/971/972 supports a user-selectable clock output function on the
P3.0/XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs
if another clock source has been selected (on-chip RC oscillator, watchdog oscillator,
external clock input on XTAL1) and if the RTC and WDT are not using the crystal oscillator
as their clock source. This allows external devices to synchronize to the
P89LPC970/971/972. This output is enabled by the ENCLK bit in the TRIM register.
The frequency of this clock output is 12 that of the CCLK. If the clock output is not needed
in Idle mode, it may be turned off prior to entering Idle, saving additional power.
7.6 On-chip RC oscillator option
The P89LPC970/971/972 has a 6-bit TRIM register that can be used to tune the
frequency of the RC oscillator. During reset, the TRIM value is initialized to a factory
preprogrammed value to adjust the oscillator frequency to 7.373 MHz
± 1 % at room
temperature. End-user applications can write to the TRIM register to adjust the on-chip
RC oscillator to other frequencies. When the clock doubler option is enabled (UCFG2.7 =
1), the output frequency is 14.746 MHz. If CCLK is 8 MHz or slower, the CLKLP SFR bit
(AUXR1.7) can be set to logic 1 to reduce power consumption. On reset, CLKLP is logic 0
allowing highest performance access. This bit can then be set in software if CCLK is
running at 8 MHz or slower. When clock doubler option is enabled, BOE0 to BOE2 bits
(UCFG1[3:5]) are required to hold the device in reset at power-up until VDD has reached
its specified level.
7.7 Watchdog oscillator option
The watchdog has a separate oscillator which provides two options: 400 kHz and 25 kHz.
It is calibrated to
±10 % at 400 kHz. The oscillator can be used to save power when a high
clock frequency is not needed.
7.8 External clock input option
In this configuration, the processor clock is derived from an external source driving the
P3.1/XTAL1 pin. The rate may be from 0 Hz up to 18 MHz. The P3.0/XTAL2/CLKOUT pin
may be used as a standard port pin or a clock output. When using an oscillator frequency
above 12 MHz, BOE0 to BOE2 bits (UCFG1[3:5]) are required to hold the device in reset
at power-up until VDD has reached its specified level.
7.9 Clock source switching on the fly
P89LPC970/971/972 can implement clock switching on any sources of watchdog
oscillator, 7 MHz/14 MHz internal RC oscillator, crystal oscillator and external clock input
during code is running. CLKOK bit in CLKCON register is used to indicate the clock switch
status. CLKOK is cleared when starting clock source switch and set when completed.
Notice that when CLKOK is ‘0’, writing to CLKCON register is not allowed.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P89LPC972FN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 2 kB/4 kB/8 kB wide-voltage byte-erasable flash |
| P89LPC972FN,129 | 功能描述:8位微控制器 -MCU MCU 80C51 8KB FLASH 20DIP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P89LPC980 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
| P89LPC980FDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
| P89LPC980FDH,529 | 功能描述:8位微控制器 -MCU 8b MICROCNTR ACCLRTD TWO CLK 80C51 CORE RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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