參數(shù)資料
型號(hào): P89LPC9401FBD,557
廠商: NXP Semiconductors
文件頁(yè)數(shù): 9/59頁(yè)
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 64-LQFP
標(biāo)準(zhǔn)包裝: 450
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LCD,LED,POR,PWM,WDT
輸入/輸出數(shù): 23
程序存儲(chǔ)器容量: 8KB(8K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-LQFP
包裝: 托盤
其它名稱: 935278626557
P89LPC9401_1
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Preliminary data sheet
Rev. 01 — 5 September 2005
17 of 59
Philips Semiconductors
P89LPC9401
8-bit two-clock 80C51 microcontroller with 32 segment
× 4 LCD driver
7.3.6 Clock output
The P89LPC9401 supports a user-selectable clock output function on the
XTAL2/CLKOUT pin when crystal oscillator is not being used. This condition occurs if
another clock source has been selected (on-chip RC oscillator, watchdog oscillator,
external clock input on X1) and if the RTC is not using the crystal oscillator as its clock
source. This allows external devices to synchronize to the P89LPC9401. This output is
enabled by the ENCLK bit in the TRIM register.
The frequency of this clock output is 1
2 that of the CCLK. If the clock output is not needed
in Idle mode, it may be turned off prior to entering idle, saving additional power.
7.4 On-chip RC oscillator option
The P89LPC9401 has a 6-bit TRIM register that can be used to tune the frequency of the
RC oscillator. During reset, the TRIM value is initialized to a factory preprogrammed value
to adjust the oscillator frequency to 7.373 MHz
± 1 % at room temperature. End-user
applications can write to the TRIM register to adjust the on-chip RC oscillator to other
frequencies.
7.5 Watchdog oscillator option
The watchdog has a separate oscillator which has a frequency of 400 kHz. This oscillator
can be used to save power when a high clock frequency is not needed.
7.6 External clock input option
In this conguration, the processor clock is derived from an external source driving the
XTAL1/P3.1 pin. The rate may be from 0 Hz up to 18 MHz. The XTAL2/P3.0 pin may be
used as a standard port pin or a clock output. When using an oscillator frequency
above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit
is required to hold the device in reset at power-up until VDD has reached its
specied level. When system power is removed VDD will fall below the minimum
specied operating voltage. When using an oscillator frequency above 12 MHz, in
some applications, an external brownout detect circuit may be required to hold the
device in reset when VDD falls below the minimum specied operating voltage.
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