參數(shù)資料
型號: P89LPC938FDH,529
廠商: NXP Semiconductors
文件頁數(shù): 59/68頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 28-TSSOP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標(biāo)準(zhǔn)包裝: 51
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LED,POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 706 (CN2011-ZH PDF)
配用: 622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1011-ND - BOARD FOR LPC938 TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-2013-5
935278546529
P89LPC938FDH-S
PIC18F87J90 FAMILY
DS39933D-page 62
2010 Microchip Technology Inc.
IPR3
PIC18F6XJ90
PIC18F8XJ90
-111 1111
-uuu 1111
PIR3
PIC18F6XJ90
PIC18F8XJ90
-000 0000
-uuu 0000(3)
PIE3
PIC18F6XJ90
PIC18F8XJ90
-000 0000
-uuu 0000
IPR2
PIC18F6XJ90
PIC18F8XJ90
11-- 111-
uu-- uuu-
PIR2
PIC18F6XJ90
PIC18F8XJ90
00-- 000-
uu-- uuu-(3)
PIE2
PIC18F6XJ90
PIC18F8XJ90
00-- 000-
uu-- uuu-
IPR1
PIC18F6XJ90
PIC18F8XJ90
-111 1-11
-uuu u-uu
PIR1
PIC18F6XJ90
PIC18F8XJ90
-000 0-00
-uuu u-uu(3)
PIE1
PIC18F6XJ90
PIC18F8XJ90
-000 0-00
-uuu u-uu
OSCTUNE
PIC18F6XJ90
PIC18F8XJ90
0000 0000
uuuu uuuu
TRISJ
PIC18F6XJ90
PIC18F8XJ90
1111 1111
uuuu uuuu
TRISH
PIC18F6XJ90
PIC18F8XJ90
1111 1111
uuuu uuuu
TRISG
PIC18F6XJ90
PIC18F8XJ90
0001 1111
uuuu uuuu
TRISF
PIC18F6XJ90
PIC18F8XJ90
1111 111-
uuuu uuu-
TRISE
PIC18F6XJ90
PIC18F8XJ90
1111 1-11
uuuu u-uu
TRISD
PIC18F6XJ90
PIC18F8XJ90
1111 1111
uuuu uuuu
TRISC
PIC18F6XJ90
PIC18F8XJ90
1111 1111
uuuu uuuu
TRISB
PIC18F6XJ90
PIC18F8XJ90
1111 1111
uuuu uuuu
TRISA(5)
PIC18F6XJ90
PIC18F8XJ90
1111 1111(5)
uuuu uuuu(5)
LATJ
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
LATH
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
LATG
PIC18F6XJ90
PIC18F8XJ90
00-x xxxx
00-u uuuu
uu-u uuuu
LATF
PIC18F6XJ90
PIC18F8XJ90
xxxx xxx-
uuuu uuu-
LATE
PIC18F6XJ90
PIC18F8XJ90
xxxx x-xx
uuuu u-uu
LATD
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
LATC
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
LATB
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
LATA(5)
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx(5)
uuuu uuuu(5)
PORTJ
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
PORTH
PIC18F6XJ90
PIC18F8XJ90
xxxx xxxx
uuuu uuuu
PORTG
PIC18F6XJ90
PIC18F8XJ90
000x xxxx
000u uuuu
PORTF
PIC18F6XJ90
PIC18F8XJ90
xxxx xxx-
uuuu uuu-
TABLE 5-2:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET
Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific conditions.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read as ‘0’.
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